Results 101 to 110 of about 3,009,916 (110)
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Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE
IEEE Journal of Solid-State Circuits, 2011Christoph Studer +2 more
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An Efficient Parallel SOVA-Based Turbo Decoder for Software Defined Radio on GPU
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2014Rongchun Li, Jiaqing Xu, Yong Dou
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Design of Prunable Interleavers for Parallel Turbo Decoder Architectures
IEEE Communications Letters, 2007Sergio Benedetto
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A multi-core-based heterogeneous parallel turbo decoder
IEICE Electronics Express, 2017Xin Cheng, Guangjun Xie
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Reconfigurable Turbo Decoder With Parallel Architecture for 3GPP LTE System
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010Hsie-Chia Chang, Cheng-Chi Wong
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Mapping interleaving laws to parallel turbo and LDPC decoder architectures
IEEE Transactions on Information Theory, 2004G Montorsi, S Benedetto
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Variable-size interleaver design for parallel turbo decoder architectures
IEEE Transactions on Communications, 2005S Benedetto
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