Results 11 to 20 of about 1,504,154 (294)
High-Level Synthesis of Online K-Means Clustering Hardware for a Real-Time Image Processing Pipeline [PDF]
The growing need for smart surveillance solutions requires that modern video capturing devices to be equipped with advance features, such as object detection, scene characterization, and event detection, etc.
Aiman Badawi, Muhammad Bilal
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SlimPort: Port-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips [PDF]
Continuous-flow microfluidic biochips (CFMBs) automatically execute various bioassays by precisely controlling the transport of fluid samples, which is driven by pressure delivered through fluidic ports. High-level synthesis, as an important stage in the
Youlin Pan +4 more
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Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks
In this paper, we present hardware accelerators created with high-level synthesis techniques for sparse and dense matrix multiplication operations. The cores can operate with different precisions and are designed to be integrated in a heterogeneous CPU ...
Jose Nunez-Yanez, Mohammad Hosseinabady
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Array-Specific Dataflow Caches for High-Level Synthesis of Memory-Intensive Algorithms on FPGAs
Designs implemented on field-programmable gate arrays (FPGAs) via high-level synthesis (HLS) suffer from off-chip memory latency and bandwidth bottlenecks. FPGAs can access both large but slow off-chip memories (DRAM), and fast but small on-chip memories
Giovanni Brignone +3 more
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Motorcycle detection based on deep learning implemented on FPGA [PDF]
This paper proposes a hardware accelerator design for motorcycle detection based on deep learning. We designed the training parameters by K-means algorithm and created the motorcycle dataset from Thailand's urban scene.
Feng Peng +3 more
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A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
Many digital signal processing applications require a channelizer capable of moving sections of the incoming spectrum to baseband quickly and efficiently with minimal spectral leakage and signal distortion.
Jennifer Pearl Smith +6 more
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It is well known that network-based parallel data processing algorithms are well suited to implementation in reconfigurable hardware recurring to either Field-Programmable Gate Arrays (FPGA) or Programmable Systems-on-Chip (PSoC).
Iouliia Skliarova
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New Real-Time High-Density Impulsive Noise Removal Method Applied to Medical Images
This paper introduces a new method for real-time high-density impulsive noise elimination applied to medical images. A double process aimed at the enhancement of local data composed of Nested Filtering followed by a Morphological Operation (NFMO) is ...
Turki M. Alanazi +5 more
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Humanoid robots find application in human-robot interaction tasks. However, despite their capabilities, their sequential computing system limits the execution of computationally expensive algorithms such as convolutional neural networks, which have ...
Joaquín Guajo +3 more
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Function‐level module sharing techniques in high‐level synthesis
High‐level synthesis (HLS), which automatically synthesizes a register‐transfer level (RTL) circuit from a behavioral description written in a high‐level programming language such as C/C++, is becoming a more popular technique for improving design ...
Hiroki Nishikawa +4 more
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