Results 141 to 150 of about 220,437 (272)
Instruction-level parallelism from execution interlock collapsing [PDF]
, 1992 N. Malik +2 more
openalex +1 more source
Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies
Concurrency and Computation: Practice and Experience, Volume 37, Issue 12-14, 25 June 2025.ABSTRACT Over the last ten years, graphics processors have become the de facto accelerator for data‐parallel tasks in various branches of high‐performance computing, including machine learning and computational sciences. However, with the recent introduction of AMD‐manufactured graphics processors to the world's fastest supercomputers, tuning ...
Johannes Pekkilä +3 more
wiley +1 more source
, 2014 High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive alternative to GPGPUs
Hameed, Saji N. +2 more
core
Polly's Polyhedral Scheduling in the Presence of Reductions
, 2015 The polyhedral model provides a powerful mathematical abstraction to enable effective optimization of loop nests with respect to a given optimization goal, e.g., exploiting parallelism.
Benaissa, Zino +3 more
core
A high-performance tensor computing unit for deep learning acceleration
ChipThe increasing complexity of neural network applications has led to a demand for higher computational parallelism and more efficient synchronization in artificial intelligence (AI) chips. To achieve higher performance and lower power, a comprehensive and
Qiang Zhou +3 more
doaj
Deep jam: conversion of coarse-grain parallelism to instruction-level and vector parallelism for irregular applications [PDF]
, 2005 Patrick Carribault +2 more
openalex +1 more source
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors [PDF]
, 2007 Jung Ho Ahn +2 more
openalex +1 more source
Parallel molecular computation on digital data stored in DNA. [PDF]
Proc Natl Acad Sci U S A, 2023 Wang B +4 more
europepmc +1 more source
Modeling Superscalar Processor Memory-Level Parallelism
IEEE computer architecture letters, 2018 Sam Van den Steen, L. Eeckhout
semanticscholar +1 more source