Results 161 to 170 of about 220,437 (272)

Register Pressure in Instruction Level Parallelism

, 2002
Sid Touati
openalex   +1 more source

A Review on Superscalar Technology with instruction level parallelism (ILP) for Faster Microprocessor

, 2018
Mr. Chirag R. Patel
openalex   +1 more source

ASIP Performance Enhancement by Hazard Control through Scoreboard. [PDF]

Micromachines (Basel)
Zhou X, Man Y, Hao P, Chen W, Yang B, Ding B, Liu D.   +6 more
europepmc   +1 more source

Image Processing Hardware Acceleration-A Review of Operations Involved and Current Hardware Approaches. [PDF]

J Imaging
Vasile CE, Ulmămei AA, Bîră C.
europepmc   +1 more source

Parallelized k-means clustering by exploiting instruction level parallelism at low occupancy [PDF]

, 2017
Adhi Prahara, Dewi Pramudi Ismi, Achmad Imam Kistijantoro, Masayu Leylia Khodra   +3 more
openalex   +1 more source

Gestalt's Perspective on Insight: A Recap Based on Recent Behavioral and Neuroscientific Evidence. [PDF]

J Intell, 2023
Vitello M, Salvi C.
europepmc   +1 more source

More Instruction Level Parallelism Explains the Actual Efficiency of Compensated Algorithms

, 2007
Philippe Langlois, Nicolas Louvet
openalex   +1 more source

Exploiting instruction- and data-level parallelism [PDF]

, 1997
Roger Espasa, Mateo Valero
openalex   +1 more source

Adaptive Switching Redundant-Mode Multi-Core System for Photovoltaic Power Generation. [PDF]

Sensors (Basel)
Liu L, Zhang X, Zhou J, Niu K, Guo Z, Zhao Y, Zhang M.   +6 more
europepmc   +1 more source

BIMSA: accelerating long sequence alignment using processing-in-memory. [PDF]

Bioinformatics
Alonso-Marín A, Fernandez I, Aguado-Puig Q, Gómez-Luna J, Marco-Sola S, Mutlu O, Moreto M.   +6 more
europepmc   +1 more source