Results 21 to 30 of about 224,259 (279)
Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading [PDF]
Jack Lo+5 more
openalex +2 more sources
Space-time scheduling of instruction-level parallelism on a raw machine [PDF]
Walter Lee+6 more
semanticscholar +4 more sources
Register Pressure in Instruction Level Parallelism
It has become a truism that memory accesses play the major role of degrading program performances. Optimizing compilers must avoid requesting data from memory, if possible, by using the available registers of underlying hardware in the best ways.This thesis reconsiders the register pressure concept so that it gets higher priority than instruction ...
Sid Touati
openalex +3 more sources
ConvAix: An Application-Specific Instruction-Set Processor for the Efficient Acceleration of CNNs
ConvAix is an application-specific instruction-set processor (ASIP) that enables the energy-efficient processing of convolutional neural networks (CNNs) while retaining substantial flexibility through its instruction-set architecture (ISA) based design ...
Andreas Bytyn+2 more
doaj +1 more source
An astute LVQ approach using neural network for the prediction of conditional branches in pipeline processor [PDF]
Nowadays, microprocessors use the deep pipeline to execute multiple instructions per cycle. The frequency and behavior of conditional instructions mainly affect the performance of instruction-level parallelism.
Sweety Nain, Prachi Chaudhary
doaj +1 more source
Design of Deep Learning VLIW Processor for Image Recognition
In order to adapt the application demands of high resolution images recognition and efficient processing of localization in aviation and aerospace fields, and to solve the problem of insufficient parallelism in existing researches, an extensible ...
doaj +1 more source
LLVM RISC-V RV32X Graphics Extension Support and Characteristics Analysis of Graphics Programs
In recent years, virtual reality technology has become the dominant means of human-computer interaction, with computer graphics rendering technology being a crucial component in realizing virtual reality experiences.
Peng Wang, Zhi-Bin Yu
doaj +1 more source
A Highly-Efficient and Tightly-Connected Many-Core Overlay Architecture
The technology advances of CPU (Central Processing Unit) architecture alternate between generalization and specialization. In the past decade, the general performance has been enhanced while addressing the new brick walls that include power, memory, and ...
Riadh Ben Abdelhamid+2 more
doaj +1 more source
Abstract This research focuses on addressing the privacy issues in healthcare advancement monitoring with the rapid establishment of the decentralised communication system in the Internet of Medical Things (IoMT). An integrated blockchain homomorphic encryption standard with an in‐build supervised learning‐based smart contract is designed to improvise ...
Chandramohan Dhasarathan+7 more
wiley +1 more source