Results 91 to 100 of about 45,362 (262)
Percolation scheduling for non-VLIW machines [PDF]
, 1990 Percolation Scheduling, a technique for compile-time code parallelization, has proven very successful for exploiting fine-grain irregular parallelism in ordinary programs.
Brownhill, Carrie J., Nicolau, Alexandru
core
Ultralow‐Power Peptide‐Based Memristor Enabled by Emulation of Proton‐Mediated Synaptic Signaling
Small Methods, EarlyView.A tyrosine‐rich peptide‐based memristor emulates proton‐mediated synaptic signaling through dual protonelectron conduction. Proton modulation via humidity or PdHx injection enables ultralow‐power switching (215 pW), ≈2500× lower than intrinsic devices. This work demonstrates a biorealistic, energy‐efficient strategy for neuromorphic electronics through
Jeong Hyun Yoon +5 more
wiley +1 more source
Performance Debugging and Tuning using an Instruction-Set Simulator [PDF]
, 1997 Instruction-set simulators allow programmers a detailed level of insight into, and control over, the execution of a program, including parallel programs and operating systems.
Magnusson, Peter S., Montelius, Johan
core +3 more sources
Memory and Parallelism Analysis Using a Platform-Independent Approach
, 2019 Emerging computing architectures such as near-memory computing (NMC) promise improved performance for applications by reducing the data movement between CPU and memory. However, detecting such applications is not a trivial task.
Awan, Ahsan Javed +5 more
core +1 more source
Freedom of Scientific Inquiry and Democracy. A Systems‐Theoretical Approach
Systems Research and Behavioral Science, EarlyView.ABSTRACT The article examines the relationship between democracy and one of its inherent features: freedom of scientific inquiry—a multi‐layered concept closely intertwined with the broader notion of academic freedom—both of which are increasingly under threat worldwide. The paper advocates for the use of Luhmann's theoretical framework to analyse this
Krešimir Žažar, Steffen Roth
wiley +1 more source
Exploiting superword level parallelism with multimedia instruction sets [PDF]
, 2000 S. Larsen, Saman Amarasinghe
openalex +3 more sources
Instruction scheduling and software pipelining for modern architectures
Труды Института системного программирования РАН, 2018 We describe the approach for instruction scheduling and software pipelining based on a two-stage extensible architecture of detecting and using the available instruction level parallelism.
Arutyun Avetisyan
doaj
Instruction-Level Parallelism and Processor Architecture [PDF]
, 2000 This year, the Euro-Par conference is being held in beautiful Munich, Germany. I am very honored to welcome you to the instruction level parallelism and pro- cessor architecture sessions of Euro-Par 2000!
openaire +2 more sources
Optimising Simulation Data Structures for the Xeon Phi [PDF]
, 2016 In this paper, we propose a lock-free architecture to accelerate logic gate circuit simulation using SIMD multi-core machines. We evaluate its performance on different test circuits simulated on the Intel Xeon Phi and 2 other machines.
Chimeh, Mozhgan K., Cockshott, Paul
core +1 more source
Symposium on Erving Goffman and the Cold War, by Gary D. Jaworski
Symbolic Interaction, EarlyView.The symposium on Gary D. Jaworski's book Erving Goffman and the Cold War is based on an "Author meets Critics" event held at the European SSSI 2024 Conference in Pisa. After a brief introduction by Dirk vom Lehn, Gary Jaworski briefly suggests his motivation for writing the book.
Chiara Bassetti +4 more
wiley +1 more source