Results 41 to 50 of about 46,626 (281)
IET Communications, EarlyView., 2022 Abstract The goal of this work is to investigate how the self‐awareness characteristic of autonomic computing, paired with existing performance optimization rules, may be used in applications to minimise multi‐core processor performance concerns. The suggested self‐awareness technique can assist applications in self‐execution while also assisting other
Surendra Kumar Shukla +8 more
wiley +1 more source
POWER: Parallel Optimizations With Executable Rewriting [PDF]
, 2011 The hardware industry's rapid development of multicore and many core hardware has outpaced the software industry's transition from sequential to parallel programs. Most applications are still sequential, and many cores on parallel machines remain unused.
Arora, Nipun +4 more
core +2 more sources
Instruction Fetch Policy for SMT Processors with Different Allocations of Floating-point and Integer Resources [PDF]
Jisuanji gongcheng, 2017 In Simultaneous Multithreading(SMT) processors,different threads have different demands for floating-point and integer resources.How to allocate shared resources among threads is the key point to improve the whole performance for SMT processors.Aiming at
JIANG Shengjian,HU Xiangdong,YANG Jianxin
doaj +1 more source
Late allocation and early release of physical registers [PDF]
, 2004 The register file is one of the critical components of current processors in terms of access time and power consumption. Among other things, the potential to exploit instruction-level parallelism is closely related to the size and number of ports of the ...
González Colás, Antonio María +4 more
core +2 more sources
Hardware schemes for early register release [PDF]
, 2002 Register files are becoming one of the critical components of current out-of-order processors in terms of delay and power consumption, since their potential to exploit instruction-level parallelism is quite related to the size and number of ports of the ...
González Colás, Antonio María +3 more
core +1 more source
IEEE Access, 2013 The adaptive Runge-Kutta (ARK) method on multi-general-purpose graphical processing units (GPUs) is used for solving large nonlinear systems of first-order ordinary differential equations (ODEs) with over ~ 10 000 variables describing a large genetic ...
Ahmad Al-Omari +3 more
doaj +1 more source
Late-Stage Optimization of Modern ILP Processor Cores via FPGA Simulation
Applied Sciences, 2022 Late-stage (post-RTL implementation) optimization is important in achieving target performance for realistic processor design. However, several challenges remain for modern out-of-order ILP (instruction-level-parallelism) processors, such as simulation ...
Mengqiao Lan +6 more
doaj +1 more source
Understanding the thermal implications of multicore architectures [PDF]
, 2007 Multicore architectures are becoming the main design paradigm for current and future processors. The main reason is that multicore designs provide an effective way of overcoming instruction-level parallelism (ILP) limitations by exploiting thread-level ...
Cai, Qiong +4 more
core +2 more sources
Strategy of microscopic parallelism for Bitplane Image Coding [PDF]
, 2015 Recent years have seen the upraising of a new type of processors strongly relying on the Single Instruction, Multiple Data (SIMD) architectural principle.
Aulí-Llinàs, Francesc +4 more
core +1 more source
Sensors, 2017 This paper aims to develop a low-cost, high-performance and high-reliability computing system to process large-scale data using common data mining algorithms in the Internet of Things (IoT) computing environment.
Yuling Fang +4 more
doaj +1 more source