Results 81 to 90 of about 8,185,322 (352)

High performance extendable instruction set computing [PDF]

open access: yes, 2001
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded microprocessor systems.
Appelbe, W, Beckett, P, Lee, H
core  

Structural dynamics of the plant hormone receptor ETR1 in a native‐like membrane environment

open access: yesFEBS Letters, EarlyView.
The present study unveils the structural and signaling dynamics of ETR1, a key plant ethylene receptor. Using an optimized nanodisc system and solution NMR, we captured full‐length ETR1 in a native‐like membrane environment. Our findings reveal dynamic domain uncoupling and Cu(I)‐induced rigidification, providing the first evidence of metal‐triggered ...
Moritz Lemke   +2 more
wiley   +1 more source

Feature instructions improve face-matching accuracy. [PDF]

open access: yesPLoS ONE, 2018
Identity comparisons of photographs of unfamiliar faces are prone to error but important for applied settings, such as person identification at passport control.
Ahmed M Megreya, Markus Bindemann
doaj   +1 more source

Randomized instruction set emulation [PDF]

open access: yesACM Transactions on Information and System Security, 2005
Injecting binary code into a running program is a common form of attack. Most defenses employ a “guard the doors” approach, blocking known mechanisms of code injection. Randomized instruction set emulation (RISE) is a complementary method of defense, one that performs a hidden randomization of an application's ...
Stephanie Forrest   +3 more
openaire   +2 more sources

Mechanistic basis for inhibition of the extended‐spectrum β‐lactamase GES‐1 by enmetazobactam and tazobactam

open access: yesFEBS Letters, EarlyView.
Antimicrobial resistance (AMR) is of huge importance, resulting in over 1 million deaths each year. Here, we describe how a new drug, enmetazobactam, designed to help fight resistant bacterial diseases, inhibits a key enzyme (GES‐1) responsible for AMR. Our data show it is a more potent inhibitor than the related tazobactam, with high‐level computation
Michael Beer   +10 more
wiley   +1 more source

Research on LLM Vector Dot Product Acceleration Based on RISC-V Matrix Instruction Set Extension [PDF]

open access: yesJisuanji kexue
Considering the high-performance and low-power requirements of edge AI,this paper designs a specialized instruction set processor for edge AI based on the RISC-V instruction set architecture,addressing practical issues in digital signal processing for ...
CHEN Xuhao, HU Sipeng, LIU Hongchao, LIU Boran, TANG Dan, ZHAO Di
doaj   +1 more source

Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism

open access: yes, 2022
Exploiting instruction level parallelism (ILP) is a widely used method for increasing performance of processors. While traditional very long instruction word (VLIW) processors can exploit ILP energy-efficiently thanks to static instruction scheduling, they suffer from bad code density with serial parts that cannot utilize the multi-issue capabilities ...
Hepola, Kari   +2 more
openaire   +3 more sources

Making State Accountability Count: How New Mexico Supports Principals With Data Tools [PDF]

open access: yes, 2007
Describes how the state is transforming assessment test data into a more useful, timely tool to help school leaders set policy and shape instruction and how the resulting data-rich environment is changing the culture of accountability in school ...
Ron Feemster
core  

Imeglimin attenuates liver fibrosis by inhibiting vesicular ATP release from hepatic stellate cells

open access: yesFEBS Letters, EarlyView.
Imeglimin, at clinically relevant concentrations, inhibits vesicular ATP accumulation and release from hepatic stellate cells, thereby attenuating purinergic signaling and reducing fibrogenic activation. This mechanism reveals a newly identified antifibrotic action of imeglimin beyond glycemic control.
Seiji Nomura   +8 more
wiley   +1 more source

Addressing Mode Extension to the ARM/Thumb Architecture

open access: yesAdvances in Electrical and Computer Engineering, 2014
In this paper, two new addressing modes are introduced to the 16-bit Thumb instruction set architecture to improve performance of the ARM/Thumb processors.
KIM, D.-H.
doaj   +1 more source

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