Results 21 to 30 of about 298,312 (311)
Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms
The ever-increasing need for securing computing systems using cryptographic algorithms is spurring interest in the efficient implementation of common algorithms.
Görkem Nişancı +2 more
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Quantum computers with tens to hundreds of noisy qubits are being developed today. To be useful for real-world applications, we believe that these near-term systems cannot simply be scaled-down non-error-corrected versions of future fault-tolerant large ...
Xiang Zou +9 more
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Function-call Instruction Characteristic Analysis Based Instruction Set Architecture Recognization Method for Firmwares [PDF]
The recognition of instruction set architecture is a crucial task for conducting security research on embedded devices,and has significant implications.However,existing studies and tools often suffer from low recognition accuracy and high false positive ...
JIA Fan, YIN Xiaokang, GAI Xianzhe, CAI Ruijie, LIU Shengli
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RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems
Redundant number systems (RNS) are a well-known technique to speed up arithmetic circuits. However, in a complete CPU, arithmetic circuits using RNS were only included on subcircuit level e.g. inside the Arithmetic Logic Unit (ALU) for realization of the
Marc Reichenbach +3 more
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Machine Assisted Proof of ARMv7 Instruction Level Isolation Properties [PDF]
In this paper, we formally verify security properties of the ARMv7 Instruction Set Architecture (ISA) for user mode executions. To obtain guarantees that arbitrary (and unknown) user processes are able to run isolated from privileged software and other ...
A. Fox +6 more
core +2 more sources
On-Line Instruction-checking in Pipelined Microprocessors [PDF]
Microprocessors performances have increased by more than five orders of magnitude in the last three decades. As technology scales down, these components become inherently unreliable posing major design and test challenges.
Di Carlo, Stefano +2 more
core +2 more sources
Design modified architecture for MCS-51 with innovated instructions based on VHDL
This paper introduces two new complex instructions over the application with specific instruction set processor. For the MCS-51 family, utilizing a reserved bit, and the unused machine code “A5h” we can modify the conventional instruction set ...
Abd-Elmoneim Mohamed Fouda +1 more
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Neural Network Acceleration Architecture Based on RISC-V Instruction Set Extension [PDF]
To address the current shortcomings of RISC-V-based neural network accelerators in accelerating matrix computations and nonlinear operations within Transformer-based models,a neural network acceleration architecture based on RISC-V instruction set ...
CAI Chenghuan, WANG Yipin, XU Jiabin, ZHANG Fengzhe, ZHOU Xuegong, CAO Wei, ZHANG Fan, YU Xinsheng
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Artificial intelligence (AI) has successfully made its way into contemporary industrial sectors such as automobiles, defense, industrial automation 4.0, healthcare technologies, agriculture, and many other domains because of its ability to act ...
Fatima Hameed Khan +2 more
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Optimization Strategy of FFmpeg Multimedia Algorithm Library Based on RISC-V [PDF]
The widespread application of RISC-V processors has made the high-performance implementation of FFmpeg multimedia algorithm library on the RISC-V platform increasingly important.This study proposes a series of RISC-V architecture-based optimization ...
ZHANG Zhen, LIANG Jun, JIA Haipeng, ZHANG Yunquan, LI Qing
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