Results 21 to 30 of about 539,422 (337)
VISA: A variable instruction set architecture [PDF]
ACM SIGARCH Computer Architecture News, 1990 This paper presents an instruction coding technique that allows to reduce the instruction width without limiting the exploitation of the machine resources. This result can be obtained by a dynamic instruction coding managed by the compiler.The technique has been applied to a VLIW-structured machine.
Alessandro De Gloria
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A Practical Quantum Instruction Set Architecture
, 2016 We introduce an abstract machine architecture for classical/quantum computations---including compilation---along with a quantum instruction language called Quil for explicitly writing these computations. With this formalism, we discuss concrete implementations of the machine and non-trivial algorithms targeting them.
Robert Smith +2 more
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A retargetable framework for instruction-set architecture simulation [PDF]
ACM Transactions on Embedded Computing Systems, 2006 Instruction-set architecture (ISA) simulators are an integral part of today's processor and software design process. While increasing complexity of the architectures demands high-performance simulation, the increasing variety of available architectures makes retargetability a critical feature of an instruction-set simulator.
Mehrdad Reshadi +2 more
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IEEE Transactions on Quantum Engineering, 2020 Quantum computers with tens to hundreds of noisy qubits are being developed today. To be useful for real-world applications, we believe that these near-term systems cannot simply be scaled-down non-error-corrected versions of future fault-tolerant large ...
Xiang Zou +9 more
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Instruction Set Architectures for Quantum Processing Units [PDF]
, 2017 To be published in the proceedings in the International Super Computing Conference 2017 ...
Keith A. Britt, Travis S. Humble
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The Clipper processor: instruction set architecture and implementation [PDF]
Communications of the ACM, 1989 Intergraph's CLIPPER microprocessor is a high performance, three chip module that implements a new instruction set architecture designed for convenient programmability, broad functionality, and easy future expansion.
Walter Hollingsworth +2 more
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A Flexible Instruction Set Architecture for Efficient GEMMs [PDF]
GEneral Matrix Multiplications (GEMMs) are recurrent in high-performance computing and deep learning workloads. Typically, high-end CPUs accelerate GEMM workloads with Single-Instruction Multiple Data (SIMD) or vector Instruction Set Architectures (ISAs).
Alexandre Santana +4 more
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On Internally Tagged Instruction Set Architectures [PDF]
IEEE Computer Architecture LettersEmad Jacob Maroun
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Instruction set architecture R2T
Problems of advanced micro- and nanoelectronic systems development, 2020 V. Erokhin
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NetQASM—a low-level instruction set architecture for hybrid quantum–classical programs in a quantum internet [PDF]
Quantum Science and Technology, 2021 We introduce NetQASM, a low-level instruction set architecture for quantum internet applications. NetQASM is a universal, platform-independent and extendable instruction set with support for local quantum gates, powerful classical logic and quantum ...
A. Dahlberg +6 more
semanticscholar +1 more source