Results 211 to 220 of about 275 (256)
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Proceedings of 1994 6th IEEE Symposium on Parallel and Distributed Processing, 2002
We investigate the costs and benefits of implementing memory interleaving in software. As our main contribution, we compare software memory interleaving to row-major allocation and logarithmic broadcasting. Our analysis demonstrates the clear superiority of software interleaving over row-major allocation in the presence of memory contention.
Ricardo Bianchini +3 more
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We investigate the costs and benefits of implementing memory interleaving in software. As our main contribution, we compare software memory interleaving to row-major allocation and logarithmic broadcasting. Our analysis demonstrates the clear superiority of software interleaving over row-major allocation in the presence of memory contention.
Ricardo Bianchini +3 more
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annals of telecommunications - annales des télécommunications, 2008
This paper is a proposal for a new form of random interleaver for a turbo code based on the probability distribution of channel statistic model of transmission, instead of a uniform probability distribution. In our work, we use the normal (Gaussian) and Rayleigh probability distribution in accordance with the channel type and compare them with classic ...
Lahcène Hadj Abderrahmane +1 more
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This paper is a proposal for a new form of random interleaver for a turbo code based on the probability distribution of channel statistic model of transmission, instead of a uniform probability distribution. In our work, we use the normal (Gaussian) and Rayleigh probability distribution in accordance with the channel type and compare them with classic ...
Lahcène Hadj Abderrahmane +1 more
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Algorithmica, 2002
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
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ACM SIGPLAN Notices, 1994
There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are sold in the workstation market, not in the multiprocessor market, it is only natural that architectural features that benefit only multiprocessors are less likely to be adopted ...
James Laudon, Anoop Gupta, Mark Horowitz
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There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are sold in the workstation market, not in the multiprocessor market, it is only natural that architectural features that benefit only multiprocessors are less likely to be adopted ...
James Laudon, Anoop Gupta, Mark Horowitz
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Interleaved Group Convolutions
2017 IEEE International Conference on Computer Vision (ICCV), 2017In this paper, we present a simple and modularized neural network architecture, named interleaved group convolutional neural networks (IGCNets). The main point lies in a novel building block, a pair of two successive interleaved group convolutions: primary group convolution and secondary group convolution. The two group convolutions are complementary: (
Ting Zhang 0002 +3 more
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Activity in an Interleaved Memory
IEEE Transactions on Computers, 1975A complicated expression for the average number of active modules, in a published model for interleaved memory, is shown to be a function well studied in other contexts.
Donald E. Knuth, Gururaj S. Rao
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The Preservation of Interleaving Equivalences
10th IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'05), 2005In recent years, though many attempts have been made to solve whether equivalences are preserved under action refinement, this problem still needs to be further investigated. The usual approach to the preservation problem is: given some well-established equivalence notion which is not preserved under refinement, is there a way of adding some restricted
Jianmin Jiang, Jinzhao Wu
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International Symposium onInformation Theory, 2004. ISIT 2004. Proceedings., 2004
Interleavers that avoid memory contentions in parallelized log-MAP decoding are analyzed and designed. Bounds are derived demonstrating that the fraction of interleavers that are contention-free is small. Nevertheless, contention-free "inter-window shuffle" interleavers with a simple implementation and reasonable memory requirements are shown to ...
Ajit Nimbalker +4 more
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Interleavers that avoid memory contentions in parallelized log-MAP decoding are analyzed and designed. Bounds are derived demonstrating that the fraction of interleavers that are contention-free is small. Nevertheless, contention-free "inter-window shuffle" interleavers with a simple implementation and reasonable memory requirements are shown to ...
Ajit Nimbalker +4 more
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Network Coding With Interleaving
2007 International Conference on Parallel Processing Workshops (ICPPW 2007), 2007Interleaving is a scheme of adapting random error-correcting codes to bursty channels in the classical coding theory Network coding has been first introduced as a new paradigm of improving network throughput by allowing coding of incoming messages at the intermediate nodes.
Zheng Huang +3 more
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2014
AbstractThis chapter discusses the phonological properties of morphologically complex words, i.e. those formed by more than one word-formation process. This chapter discusses both “cyclicity”, in the strict sense of the same phonological alternation or constraint applying at each step of word formation, and “layering”, in which phonology is imposed at ...
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AbstractThis chapter discusses the phonological properties of morphologically complex words, i.e. those formed by more than one word-formation process. This chapter discusses both “cyclicity”, in the strict sense of the same phonological alternation or constraint applying at each step of word formation, and “layering”, in which phonology is imposed at ...
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