Results 131 to 140 of about 1,494 (268)
Inverse consistency error for validating deformable image registration: an explorative study on computational phantoms. [PDF]
Loi G +9 more
europepmc +1 more source
Binder‐free laser powder bed fusion of 8YSZ with a femtosecond laser is used to map process windows linking scan strategy, heat accumulation, and grain growth. Time‐resolved thermography and simulations reveal thermal regimes that enable continuous, vitrified, and fine‐grained 8YSZ surface layers without absorptive additives and demonstrate ...
Markus Kühn +5 more
wiley +1 more source
Gentle-Sketch: a high-performance and compact invertible sketch for top-K estimation. [PDF]
Xin Y +5 more
europepmc +1 more source
CT‐based finite element simulations combined with in situ X‐ray computed tomography are used to analyze insert pull‐out in nickel‐coated polymer foams. Despite variations in material parameters, deformation consistently concentrates within a narrow annular region around the insert.
Yannik Bautz +4 more
wiley +1 more source
Zero-bit self-adaptive spectral noise shaping for speech and audio coding. [PDF]
Omidi Piralideh N +2 more
europepmc +1 more source
This perspective reframes additive manufacturing for electrical machines as a qualification‐limited materials and architecture design problem. It links process–structure–property–performance relationships to magnetic, conducting, dielectric, and thermal property windows, highlighting where AM can enable segmented magnetic circuits, permanent magnet ...
Dénes Fodor, Loránd Szabó
wiley +1 more source
Lightweight Anonymous Group Authentication and Quantum-Cloud Key Distribution Based on PUF for Classical Network Environments. [PDF]
Zhang H, Chen Y, Chen S, Zhao Z, Zhu D.
europepmc +1 more source
Nanoscale chemical imaging with structured X-ray illumination. [PDF]
Li J +5 more
europepmc +1 more source
Edible electronics needs integrated logic circuits for computation and control. This work presents a potentially edible printed chitosan‐gated transistor with a design optimized for integration in circuits. Its implementation in integrated logic gates and circuits operating at low voltage (0.7 V) is demonstrated, as well as the compatibility with an ...
Giulia Coco +8 more
wiley +1 more source

