Results 121 to 130 of about 9,432 (249)

Spin‐Split Edge States in Metal‐Supported Graphene Nanoislands Obtained by CVD

Advanced Materials, Volume 38, Issue 51, 11 September 2026.
Combining STM measurements and ab‐initio calculations, we show that zig‐zag edges in graphene nanoislands grown on Ni(111) by CVD retrieve their spin‐polarized edge states after intercalation of a few monolayers of Au. ABSTRACT Spin‐split states localized on zigzag edges have been predicted for different free‐standing graphene nanostructures.
Michele Gastaldo, Masoud Mansouri, Carlos Garcia‐Fernandez, Daniel Sánchez‐Portal, Aran Garcia‐Lekue, Gustavo Ceballos, Aitor Mugarza   +6 more
wiley   +1 more source

Comparative analysis of analog LDO design [PDF]

, 2016
The presented research analyses different topologies of low dropout (LDO) regulator, mostly focusing on different frequency compensation schemes and power supply rejection analysis.
Lee, Dong Joon
core  

Gapless Superconductivity From Extremely Dilute Magnetic Disorder in 2H‐NbSe2‐xSx

Advanced Materials, Volume 38, Issue 51, 11 September 2026.
We demonstrate that 2H‐NbSe2‐xSx hosts gapless superconductivity at unexpectedly low magnetic impurity concentrations. Combining STM, Bogoliubovde Gennes simulations, DFT, and quasiparticle interference, we comprehensively study the development of gapless behavior and show that SeS substitution reshapes the band structure, enhances nesting, and drives ...
Jose Antonio Moreno, Mercè Roig, Víctor Barrena, Edwin Herrera, Alberto M. Ruiz, Samuel Mañas‐Valero, Antón Fente, Anita Smeets, Jazmín Aragón, Yanina Fasano, Beilun Wu, Maria N. Gastiasoro, Eugenio Coronado, José J. Baldoví, Brian M. Andersen, Isabel Guillamón, Hermann Suderow   +16 more
wiley   +1 more source

High‐Mobility and Reliability Ultra‐Thin‐Channel Oxide Semiconductor Field‐Effect Transistors for Chip‐Interconnect‐Embedded Logic and Ferroelectric Memory

Advanced Materials, Volume 38, Issue 52, 16 September 2026.
BEOL‐compatible bilayer heterojunction oxide channel dual‐mode, memory‐logic ferroelectric transistor is fabricated to address long‐standing challenges of mobility and threshold voltage trade‐off by suppressing interfacial defects. This approach not only advances oxide semiconductors toward reliable high‐performance BEOL transistors but also opens new ...
Chun‐Kuei Chen, Sonu Hooda, Maheswari Sivan, Quanzhen Wan, Marco A. Villena, Bastien Beltrando, Zefeng Xu, Zihang Fang, Evgeny Zamburg, Juan B. Roldán, Luca Larcher, Gaurav Thareja, Aaron Voon‐Yew Thean   +12 more
wiley   +1 more source

Controlling Radiative Phonons in the van der Waals Ferroelectric NbOI2

Advanced Materials, Volume 38, Issue 53, 21 September 2026.
Using a simple mirror geometry, this work demonstrates local‐density‐of‐optical‐states control of THz phonon emission in van der Waals ferroelectric NbOI2. By engineering the photonic environment, the phonon Q‐factor, linewidth, peak frequency, and emission intensity are reversibly tuned by over an order of magnitude, revealing radiative phonons as ...
Baolong Zhang, Ruihuan Duan, Sobhan Subhra Mishra, Thomas Tan Caiwei, Zheng Liu, Ranjan Singh   +5 more
wiley   +1 more source

Design of LDO using active capacitor

In modern system-on-chip (SoC) designs, the power management unit (PMU) plays important role in providing the regulated voltage supply to different functional blocks on a chip.
Lin, Lijing
core  

Orçamento Brasil: LDO [Economia documentários]

, 2014
Educação Superior::Ciências Humanas::Ciência PolíticaEducação Superior::Ciências Sociais Aplicadas::EconomiaApresenta o episódio do programa sobre LDO, lei de diretrizes orçamentárias. O vídeo primeiramente traz a importância do planejamento do orçamento
TV Câmara
core  

High‐Performance Piezoelectric Nanogenerators Based on Wurtzite BeO Nanowire Arrays

Advanced Materials Technologies, Volume 11, Issue 18, 18 September 2026.
This study demonstrates high‐performance piezoelectric nanogenerators based on 1D BeO nanowire arrays. The BeO nanowires exhibit a high piezoelectric coefficient (∼15.8 pm V−1) and deliver an output voltage of ∼26.1 V and power density of ∼0.32 µW cm−2.
Yoonseo Jang, Jihyeon Park, Seoyeah Oh, Jonghyun Bae, Prakash R. Sultane, Christopher W. Bielawski, Jiwon Kim, Jungwoo Oh   +7 more
wiley   +1 more source

NMOS based LDO using Recycling Folded Cascode as Error Amplifier

Este trabalho apresenta um NMOS-LDO convencional robusto implementado em tecnologia FinFet de 16 nm. O LDO apresenta um Recycling Folded CAscode (RFC) como amplificador de erro. Uma simples modificação foi feita no RFC convencional para integrar este OTA
Máximo, Miguel Ricardo da Cruz
core  

Graphene (0002)/Diamond (111) Heterojunction with High Piezoresistive Response

Advanced Science, Volume 13, Issue 50, 7 September 2026.
Graphene/diamond heterostructures show promise as silicon alternatives for semiconductors, but high‐quality integration is challenging. Thermal electron irradiation enables covalent bonding; lonsdaleite acts as an intermediate. The heterostructure exhibits a high piezoresistive response (gauge factor −1149) associated with electron‐rich layers and ...
Xueyu Zhang, Kun Guo, Zhigang Gai, Tianxiao Guo, Yuan Gao, Jiancai Leng, Mei Zhang, Tonggang Jiu, Yibao Wang, Shousheng Liu, Xin Jiang   +10 more
wiley   +1 more source