Results 121 to 130 of about 20,099 (257)

Robust and Compatible Ferroelectric Memories with Polycrystalline TiO2 Channel for 3D Integration

Advanced Electronic Materials, EarlyView.
Robust and monolithic 3D compatible ferroelectric memories are realized using the polycrystalline TiO2 channel‐based FeFET. The review covers physical mechanisms of the TiO2 channel FeFET, quantitative benchmarking, and advanced planar/vertical architectures for monolithic 3D integration based on HfO2‐TiO2 gate stack, offering a roadmap for reliable ...
Xujin Song, Chenxi Yu, Shangze Li, Dijiang Sun, Jiajia Zhang, Haotong Zhu, Xiaomin Xiao, Xionghao Qin, Xiaoyan Liu, Xing Zhang, Jinfeng Kang   +10 more
wiley   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Millisecond‐Scale Relaxation in Metastable HZO Ferroelectric Capacitors for Bio‐Inspired Temporal Computing

Advanced Electronic Materials, EarlyView.
Through the introduction of a niobium oxide layer into a hafnia ferroelectric capacitor stack, we build a memory device with a strong imprint effect. This imprint leads to a millisecond retention loss that can be tuned by the programming conditions that can be utilized as a scalable, analog hardware time constant for bio‐inspired temporal computing ...
Luca Fehlings, Thomas Mikolajick, Beatriz Noheda, Erika Covi   +3 more
wiley   +1 more source

Experimental Comparison and Empirical Path Loss Modeling of LoRa Communication in Line-of-Sight and Forest Environments at 923 MHz. [PDF]

Sensors (Basel)
Boonlom K, Khonrang J, Akkaraekthalin P, Chudpooti N.   +3 more
europepmc   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

Advanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho, Dae‐won Kim, Yujin Kim, Jung‐Heum Na, Yuwon Jeong, Dong‐Yeop Lee, Shinhyun Choi   +6 more
wiley   +1 more source

Security-Aware Codebook Design for Low-PAPR AFDM Systems. [PDF]

Sensors (Basel)
Zhang T, Dai H.
europepmc   +1 more source

Multi‐Vth IGZO FETs Enabled by Continuous‐wave Laser Scanning Annealing for Low Thermal Budget 3D Integration

Advanced Electronic Materials, EarlyView.
A novel strategy is used to fabricate multi‐threshold‐voltage (multi‐Vth) IGZO FETs via continuous‐wave laser scanning annealing (CW‐LSA). By tuning the laser power and scan speed, low, standard, and high Vth values of 0.22, 0.42, and 0.62 V, respectively, were achieved on a single wafer with excellent uniformity (coefficient of variation: 2.17%–6.61%).
Jun‐Hyeok Choi, Kiyung Kim, Hyeon‐Seok Shin, Uigwan Shin, Byeong Gwan Kim, Jae Hyeon Jun, Joon Kim, Yoonyoung Chung, Byoung Hun Lee   +8 more
wiley   +1 more source

Low-power analog and mixed-signal circuit techniques for next-generation miniature implantable neural interface systems. [PDF]

Biomed Eng Lett
Zhao L, Jia Y.
europepmc   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

Advanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez, Niladri Bhattacharjee, Yuxuan He, Giulio Galderisi, Brojogopal Sapui, Sara Mannaa, Ian O'Connor, Violetta Sessi, Peter Javorka, Thomas Mikolajick, Jens Trommer   +10 more
wiley   +1 more source

Hierarchical Semantic Transmission and Lyapunov-Optimized Online Scheduling for the Internet of Vehicles. [PDF]

Sensors (Basel)
Jiang L, Guo Y, Zhang W, Wang P, Han S.
europepmc   +1 more source