Results 101 to 110 of about 11,256 (247)
Heterogeneous Architectures Programming Library
Embedded platforms with heterogeneous architecture, considered in this paper, consist of one primary and one or more secondary processors. Development of software systems for these platforms poses substantial difficulties, requiring a distinct set of ...
G. V. Kirgizov, I. A. Kirilenko
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Software deobfuscation methods: analysis and implementation
This paper describes the work on development of the deobfuscation software. The main target of the developed software is the analysis of the obfuscated malware code.
Sh. F. Kurmangaleev +5 more
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CppInterOp: Advancing Interactive C++ for High Energy Physics [PDF]
The Cling C++ interpreter has transformed language bindings by enabling incremental compilation at runtime. This allows Python to interact with C++ on demand and lazily construct bindings between the two.
Jomy Aaron +4 more
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Interprocedural taint analysis for LLVM-bitcode
Today the development cycle of many application classes requires a security analysis stage. Taint analysis is widely used to check programs for different security vulnerabilities. This paper describes static interprocedural flow, context, and object-sensitive taint analysis approach for C/C++ applications.
V. K. Koshelev +2 more
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Link-time optimization and static analyzing systems scalability problem is of current importance: in spite of growth of performance and memory volume of modern computers programs grow in size and complexity as much. In particular, this is actual for such
Ksenia Dolgorukova
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Faster sorting algorithms discovered using deep reinforcement learning. [PDF]
Mankowitz DJ +29 more
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The demand for Artificial Intelligence (AI) based solutions is exponentially increasing in all application fields, including low-power devices on the edge.
Karthikeyan Kalyanasundaram Balasubramanian +4 more
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Application Experiences on a GPU-Accelerated Arm-based HPC Testbed. [PDF]
Elwasif W +33 more
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Design and Optimization of LLVM Compiler for Domestic High Performance Accelerator [PDF]
National University of Defense Technology independently developed a high-performance accelerator that uses an on-chip heterogeneous fusion architecture of a Central Processing Unit(CPU) and General Purpose Digital Signal Processor(GPDSP).
SONG Qiang, TANG Junlong, CHEN Zhaoyun, SHI Yang, TAN Qixuan, XIAO Ziyang, ZOU Wanghui
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