Results 21 to 30 of about 5,396 (256)
Translation Validation for LLVM’s AArch64 Backend
Proceedings of the ACM on Programming LanguagesLLVM's backends translate its intermediate representation (IR) to assembly or object code. Alongside register allocation and instruction selection, these backends contain many analogues of components traditionally associated with compiler middle ends: dataflow analyses, common subexpression elimination, loop invariant code motion, and a first-
Ryan Berger +8 more
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Back-end porting of FT_MX based on LLVM compilation architecture [PDF]
MATEC Web of Conferences, 2021 The processor FT_MX is a high-performance chip independently developed by the National University of Defense Technology, with an innovative architecture and instruction set.
Deng Ping +3 more
doaj +1 more source
LLVM Static Analysis for Program Characterization and Memory Reuse Profile Estimation [PDF]
International Symposium on Memory Systems, 2023 Profiling various application characteristics, including the number of different arithmetic operations performed, memory footprint, etc., dynamically is time- and space-consuming.
Atanu Barai +4 more
semanticscholar +1 more source
, 2023 У роботі наведено огляд компонентів платформи LLVM, проаналізовано механізми безпеки та виконано тестування захищеностів від шкідливого коду. В аналіз безпеки входить перевірка можливих вразливостей, та систем захисту які інтегровані в системі.
Коваль, Д. К.
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Reasoning About LLVM Code Using Codewalker [PDF]
Electronic Proceedings in Theoretical Computer Science, 2015 This paper reports on initial experiments using J Moore's Codewalker to reason about programs compiled to the Low-Level Virtual Machine (LLVM) intermediate form. Previously, we reported on a translator from LLVM to the applicative subset of Common Lisp
David S. Hardin
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Parallel Extraction of Program Analysis Information on LLVM Based on GPU [PDF]
Jisuanji gongcheng, 2017 Low Level Virtual Machine(LLVM) Intermediate Representation(IR) contains a lot of original program analysis information.The traditional information extraction method is based on the serial loop iterations under CPU.When dealing with large-scale programs ...
MA Dongdong,ZHONG Lujie,ZHU Jingru
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Automatic Vectorization Transplant and Optimization of LLVM for Domestic Processors [PDF]
Jisuanji gongcheng, 2022 Automatic vectorization is essential in SIMD extension vectorization, and has been implemented in the LLVM compiler.However, the difference of vector length and instruction set functions can cause the domestic processors to lose the opportunity of ...
LI Jia'nan, HAN Lin, CHAI Yunda
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Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 Emerging nonvolatile memory yields, alongside many advantages, technical shortcomings, such as reduced cell lifetime. Although many wear-leveling approaches exist to extend the lifetime of such memories, usually a tradeoff for the granularity of wear ...
Nils Holscher +6 more
semanticscholar +1 more source
Description of the approach to development of the obfuscating compiler
Труды Института системного программирования РАН, 2018 Nowadays protecting intellectual property rights for created software is very important because of many competing companies and ubiquitous piracy. The powerful technique for this protection is to obfuscate program code.
Sh. F. Kurmangaleev +2 more
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Automatic Verification of LLVM Code
CoRR, 2020 In this work we present our work in developing a software verification tool for llvm-code - Lodin - that incorporates both explicit-state model checking, statistical model checking and symbolic state model checking algorithms.
Axel Legay +2 more
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