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SARO: Scalable Attack-Resistant Logic Locking

IEEE Transactions on Information Forensics and Security, 2021
Intellectual property (IP) protection against piracy and reverse engineering (RE) has emerged as a critical area of research in the field of hardware security. Logic locking has been studied as a promising technique to provide robust protection against these attacks.
Abdulrahman Alaql, Swarup Bhunia
openaire   +1 more source

Trustworthy Hardware Design with Logic Locking

2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021
As the designated root of trust, hardware is undoubtedly the most critical layer to security in modern electronic systems. Protecting its integrity throughout the integrated circuit supply chain is of paramount importance. Logic locking has become a prominent tool to safeguard hardware against malicious design modifications.
Dominik Sisejkovic, Rainer Leupers
openaire   +1 more source

Temporal Logic Verification of Lock-Freedom

2010
Lock-free implementations of data structures try to better utilize the capacity of modern multi-core computers, by increasing the potential to run in parallel. The resulting high degree of possible interference makes verification of these algorithms challenging. In this paper we describe a technique to verify lock-freedom, their main liveness property.
Tofan, Bogdan   +3 more
openaire   +1 more source

Attacks on Logic Locking Obfuscation Techniques

2021 IEEE International Conference on Consumer Electronics (ICCE), 2021
Logic Locking is a relatively new obfuscation technique that is at the forefront of preventing IP theft, piracy, overproduction, and counterfeiting of chips made in contracted foundries. As logic locking develops and new gate insertion techniques are created, their resilience to attacks must be evaluated to know their true effectiveness. In this paper,
Jake Mellor   +3 more
openaire   +1 more source

Pre-SAT Logic Locking

2019
This chapter focuses on the Pre-SAT logic locking, presenting three techniques, RLL, FLL, and SLL, in addition to describing the sensitization attack. RLL is the earliest known logic locking technique that was introduced to thwart IC piracy. FLL improves upon RLL and prevents the black-box usage of an IC. However, both RLL and FLL remain susceptible to
Muhammad Yasin   +2 more
openaire   +1 more source

Keynote: A Disquisition on Logic Locking

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
The fabless business model has given rise to many security threats, including piracy of intellectual property (IP), overproduction, counterfeiting, reverse engineering (RE), and hardware Trojans (HT). Such threats severely undermine the benefits of the fabless model.
Abhishek Chakraborty   +8 more
openaire   +1 more source

The Need for Logic Locking

2019
The first chapter of the book describes the need for logic locking and how it addresses the hardware security challenges faced by the IC design community. The chapter begins with a description of the globalized IC design flow and the associated security threats.
Muhammad Yasin   +2 more
openaire   +1 more source

SARLock: SAT attack resistant logic locking

2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2016
Logic locking is an Intellectual Property (IP) protection technique that thwarts IP piracy, hardware Trojans, reverse engineering, and IC overproduction. Researchers have taken multiple attempts in breaking logic locking techniques and recovering its secret key. A Boolean Satisfiability (SAT) based attack has been recently presented that breaks all the
Muhammad Yasin   +3 more
openaire   +1 more source

Logic Locking

2023
Dominik Sisejkovic, Rainer Leupers
openaire   +1 more source

Designing Deceptive Logic Locking

2022
Dominik Sisejkovic, Rainer Leupers
openaire   +1 more source

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