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SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking
International Conference on VLSI DesignThe logic locking technique has been widely used to protect integrated circuits (ICs) from unauthorized access, intellectual property (IP) theft, etc. Among various locking mechanisms, multiplexer (MUX)-based logic locking has gained attention due to its
Jugal Gandhi +5 more
semanticscholar +1 more source
Temporal Logic Verification of Lock-Freedom
2010Lock-free implementations of data structures try to better utilize the capacity of modern multi-core computers, by increasing the potential to run in parallel. The resulting high degree of possible interference makes verification of these algorithms challenging. In this paper we describe a technique to verify lock-freedom, their main liveness property.
Tofan, Bogdan +3 more
openaire +1 more source
Attacks on Logic Locking Obfuscation Techniques
2021 IEEE International Conference on Consumer Electronics (ICCE), 2021Logic Locking is a relatively new obfuscation technique that is at the forefront of preventing IP theft, piracy, overproduction, and counterfeiting of chips made in contracted foundries. As logic locking develops and new gate insertion techniques are created, their resilience to attacks must be evaluated to know their true effectiveness. In this paper,
Jake Mellor +3 more
openaire +1 more source
2019
This chapter focuses on the Pre-SAT logic locking, presenting three techniques, RLL, FLL, and SLL, in addition to describing the sensitization attack. RLL is the earliest known logic locking technique that was introduced to thwart IC piracy. FLL improves upon RLL and prevents the black-box usage of an IC. However, both RLL and FLL remain susceptible to
Muhammad Yasin +2 more
openaire +1 more source
This chapter focuses on the Pre-SAT logic locking, presenting three techniques, RLL, FLL, and SLL, in addition to describing the sensitization attack. RLL is the earliest known logic locking technique that was introduced to thwart IC piracy. FLL improves upon RLL and prevents the black-box usage of an IC. However, both RLL and FLL remain susceptible to
Muhammad Yasin +2 more
openaire +1 more source
2019
The first chapter of the book describes the need for logic locking and how it addresses the hardware security challenges faced by the IC design community. The chapter begins with a description of the globalized IC design flow and the associated security threats.
Muhammad Yasin +2 more
openaire +1 more source
The first chapter of the book describes the need for logic locking and how it addresses the hardware security challenges faced by the IC design community. The chapter begins with a description of the globalized IC design flow and the associated security threats.
Muhammad Yasin +2 more
openaire +1 more source
SARLock: SAT attack resistant logic locking
2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2016Logic locking is an Intellectual Property (IP) protection technique that thwarts IP piracy, hardware Trojans, reverse engineering, and IC overproduction. Researchers have taken multiple attempts in breaking logic locking techniques and recovering its secret key. A Boolean Satisfiability (SAT) based attack has been recently presented that breaks all the
Muhammad Yasin +3 more
openaire +1 more source
Logic locking for IP security: A comprehensive analysis on challenges, techniques, and trends
Computers & security, 2023Jugal Gandhi +3 more
semanticscholar +1 more source