Results 261 to 270 of about 20,128 (302)
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A Current-Efficient, Low-Dropout Regulator with Improved Load Regulation
2009 IEEE Workshop on Microelectronics and Electron Devices, 2009This paper presents a novel topology for LDO regulators, improving load regulation with very low quiescent current. The core of the circuit is made by operating the pass transistor in the linear region, achieving an area reduction above 90%, reducing the gate capacitance and therefore improving loop response.
Luis Gutierrez +2 more
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Basics of floating-gate low-dropout voltage regulators
Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144), 2002This paper presents an overview of series voltage regulators, beginning with single-transistor designs and exploring the various design issues and concepts. The regulating characteristics of nFET and pFET single-transistor regulators are compared analytically and experimentally to determine an optimal starting topology.
null Aichen Low, P. Hasler
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Capacitorless Self-Clocked All-Digital Low-Dropout Regulator
IEEE Journal of Solid-State Circuits, 2019This paper presents a capacitorless self-clocked digital low-dropout (SC-DLDO) regulator with self-shifting bidirectional shift registers (SS-BiSHRs) for power management applications in a system-on-chip (SoC). The load transient response is accelerated by utilizing coarse-then-fine control.
Muhammad Abrar Akram +2 more
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Ferroelectric Domain Wall Delayer and Low-Dropout Regulator
ACS Applied Materials & InterfacesA switching-type power converter providing an accurate and stable switching output voltage against line/load variations and power supply ripple is mostly complicated in system-on-chip power management integrated circuits (PMICs) within a limited occupation area. Here we fabricated domain wall (DW) nanodevices using an X-cut LiNbO3 thin film on silicon.
Yiming Li +4 more
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Total dose degradation of low-dropout voltage regulators
IEEE Radiation Effects Data Workshop, 2005., 2005A low dropout voltage regulator that uses a lateral pnp transistor as a pass transistor in the output stage is evaluated for total dose degradation. Degradation occurs from two different mechanisms, one involving gradual degradation due to changes in internal reference voltage resulting in small changes in output voltage saturation characteristics; and
T.F. Miyahira, B.G. Rax, A.H. Johnston
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A 0.5 V low-voltage low-dropout regulator
2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), 2017This work proposes a low-dropout (LDO) regulator to provide low supply voltage of 0.5 V with the input range from 0.7 V to 0.9 V. The reference voltage of this LDO regulator is generated with the zero temperature coefficient circuit composed by MOS transistors in the subthreshold condition.
Ding-Lan Shen, Ting-Ta Lee
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Low-Dropout Voltage Regulator Having Multiple Error Amplifiers
International Journal on Communications Antenna and Propagation (IRECAP), 2014In this paper, a low-dropout voltage (LDO) regulator having multiple error amplifiers was proposed. One of the multiple error amplifiers has a low gain and a wide bandwidth, and another has a high gain and a narrow bandwidth. The multiple error amplifiers are located in the feedback loop of the LDO voltage regulator and selectively perform ...
Tae Ryong Park, Jae Chang Kwak
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Design of a Low-Voltage Low-Dropout Regulator
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014A low-voltage low-dropout (LDO) regulator that converts an input of 1 V to an output of 0.85–0.5 V, with 90-nm CMOS technology is proposed. A simple symmetric operational transconductance amplifier is used as the error amplifier (EA), with a current splitting technique adopted to boost the gain.
Chung-Hsun Huang +2 more
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Frequency compensation in low-dropout regulator
2014Nowadays, high-efficiency low-noise power supplies for portable equipment such as cellular phones and personal digital assistance (PDA) are in great demand. Low-dropout regulators (LDRs) are usually used to obtain this stable and low-noise supply voltage.
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High power supply rejection wideband Low-Dropout regulator
2013 IEEE ECCE Asia Downunder, 2013A 90nm 1.4-3.3V CMOS Low-Dropout regulator for noise-sensitive low-current RF blocks in mixed SoC applications is presented. It is based on a two loops topology with replica technique and an additional Gm-C filter introduced in the replica loop for high power supply rejection at both low and high frequencies.
Thomas Coulot +4 more
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