CAPACITOR-LESS LOW-DROPOUT VOLTAGE REGULATOR
International Journal of Electronics and Electical Engineering, 2014 A 1.2-V 40-mA capacitor-free CMOS low-dropout regulator (LDO) for system-on-chip applications to reduce board space and external pins is presented. By utilizing damping-factor control frequency compensation on the advanced LDO structure, the proposed LDO provides high stability, as well as fast line and load transient responses, even in capacitorfree ...
SRIRANGANATHA SAGAR.K.N +2 more
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An Area Efficient Low Dropout Voltage Regulator With Improved Transient Response for Hearing-aid Applications [PDF]
Iranian Journal of Electrical and Electronic Engineering, 2023 This paper presents a low dropout voltage regulator, with the specifications suitable for hearing aid devices. The proposed LDO occupies very less area on chip and provides an excellent transient response.
Ananthakrishna T +2 more
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Design and modelling of positive LDO voltage regulator [PDF]
E3S Web of ConferencesIn present study the total ionizing dose effects in a positive low-dropout linear voltage regulator IS-LS1-3.3V was investigated experimentally using the developed the X-ray research complex.
Rybalka Sergey +2 more
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Current Context and Research Trends in Linear DC–DC Converters
Applied Sciences, 2022 With the introduction of switch-mode power supplies (SMPS) in the mid-1970s, the efficiency of DC–DC conversion rose from 60 to 80% and SMPS became a popular power supply solution. However, linear regulators have not become obsolete.
Kosala Gunawardane +4 more
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The use of output-capacitorless class-AB CMOS low-dropout regulator for power management [PDF]
, 2017 Peer ReviewedPostprint (published ...
Martínez García, Herminio
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Quasi-digital low-dropout voltage regulators uses controlled pass transistors [PDF]
, 2016 This article presents a low quiescent current output capacitorless quasi-digital CMOS LDO regulator with controlled pass transistors according to load demands.
Alarcón Cot, Eduardo José +2 more
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A Low-Dropout Voltage Regulator with a Fractional-Order Control [PDF]
Radioengineering, 2016 This paper presents a 5 V / 50 mA low-dropout voltage regulator (LDO). The LDO uses a fractional-order control for its regulation loop to achieve a high DC gain (for a tight DC regulation) while avoiding (for a good stability) a high gain at high ...
L. Kadlcik, P. Horsky
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A Direct Feedback FVF LDO for High Precision FMCW Radar Sensors in 65-nm CMOS Technology
Sensors, 2022 A direct feedback flipped voltage follower (FVF) LDO for a high-precision frequency-modulated continuous-wave (FMCW) radar is presented. To minimize the effect of the power supply ripple on the FMCW radar sensor’s resolution, a folded cascode error ...
Jun-Hee Lee, Mun-Kyo Lee, Jung-Dong Park
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Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital ICs in 3.3V CMOS Technology [PDF]
, 1998 A fully integrated 5 V-to-3.3 V supply voltage regulator for application in digital IC's has been designed in a 3.3 V 0.5 μm CMOS process. The regulator is able to deliver peak current transients of 300 mA, while the output voltage remains within a ...
Besten, Gerrit W. den, Nauta, Bram
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Design of a Low-Noise Low Dropout Regulator for CMOS Pixel Sensors
IEEE AccessA low-noise Low Dropout Regulator (LDO) is designed in a Semiconductor Manufacturing International Corporation (SMIC) $0.18~\mu $ m process, aiming at supply of a clean and constant clamping voltage in the operation of Correlated Double Sampling (CDS ...
Shi Zhan +4 more
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