Results 261 to 270 of about 14,353,564 (303)

Technology mapping for low power

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198), 1999
Power consumption has become a great concern for IC and system designs. As a consequence, power-driven technology mapping has attracted several research attentions. However, the power model they used cannot properly capture the power dissipation when the output of a gate does not switch.
Ching-Wei Yeh, Chin-Chao Chang, Jinn-Shyan Wang   +2 more
openaire   +1 more source

Low power memory design

Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors, 2003
In this paper, we present a novel design procedure for multi-module, multi-port memory design that satisfies area and/or energy/timing constraints. Our procedure consists of (i) use of storage bandwidth optimization (SBO) techniques to simplify the conflict graph and (ii) use of memory exploration techniques to determine the best memory configuration ...
openaire   +1 more source

A low power video processor

Proceedings of the 1998 international symposium on Low power electronics and design - ISLPED '98, 1998
Multiple power saving methods were applied to a video processor for color digital video and still cameras. Architectural level methods failed to save power: asynchronous design, dynamic voltage scaling, bus switching minimization, pipeline stage merging, reduction of switching times and clock gating.
Uzi Zangi, Ran Ginosar
openaire   +1 more source

Instruction Scheduling for Low Power

Journal of VLSI signal processing systems for signal, image and video technology, 2004
Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on ...
Parikh, A, Kim, S Kim, Soontae, Kandemir, M, Vijaykrishnan, N, Irwin, MJ   +4 more
openaire   +3 more sources

Design of low-power libraries

1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196), 2002
The design of a low-power standard cell library has to satisfy several requirements, such as low activity of the internal nodes, reduced parasitic capacitances and the ability to work at very low Vdd. This paper presents some of these aspects with design examples of basic cells of a low-power library.
openaire   +2 more sources

Low power compression architecture

2010 28th VLSI Test Symposium (VTS), 2010
DFT Compression and limiting power during test are two of the recent active areas of interest in the domain of DFT and Manufacturing Test. Many of the low-power test techniques, as well as DFT compression schemes exploit the ‘don't-care’ bits in ATPG vectors to achieve the desirable results, and hence often can be in conflict with each other.
openaire   +1 more source

Low Power Reconfigurable Devices

2004
Advancements in VLSI technology have enabled the development of large reconfigurable platforms, which are being increasingly used in a wide variety of applications. Among the various reconfigurable devices currently in use, FPGAs have emerged as the most popular reconfigurable devices.
openaire   +2 more sources

Increase in frequency of nuclear power outages due to changing climate

Nature Energy, 2021
Ali Ahmad
exaly  

Wireless power transfer based on novel physical concepts

Nature Electronics, 2021
Polina Kapitanova, Alex Krasnok, Mingzhao Song   +2 more
exaly  

Power system stability issues, classifications and research prospects in the context of high-penetration of renewables and power electronics

Renewable and Sustainable Energy Reviews, 2021
Haozhi Li, Jan Shair, Jiabing Hu
exaly