Results 251 to 260 of about 20,128 (303)

A Capacitor-Free CMOS Low-Dropout Regulator

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007
A 2.5V capacitor-free CMOS low dropout regulator for powering analog circuits is presented. Stable operation is achieved with or without a large load capacitor by replacing the bulky external output capacitor with an operational amplifier-based active circuit.
Kostamovaara Juha Tapio, Loikkanen Mikko
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Programmable low dropout voltage regulator

Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
We present a design for a low dropout (LDO) voltage regulator is presented using floating-gate techniques to set the regulator output voltage and the ac and dc operating points of the circuit. In comparison with conventional topologies, this approach does not require a feedback resistive divider or a bandgap reference to generate a temperature ...
P. Hasler, null Ai Chen Low
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A CMOS Low-Noise, Low-Dropout Regulator

2010 Asia-Pacific Power and Energy Engineering Conference, 2010
This paper presents a design technique of low noise fully CMOS low-dropout voltage regulator based on suitable error amplifier and unity feedback network. The inherent thermal and flicker noise are represented by equivalent current and voltage sources.
Qingyun Li, Jinguang Jiang, Jiake Wang, Xu Gong, Xifeng Zhou, Shanshan Li   +5 more
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Low-Dropout Voltage Source: An Alternative Approach for Low-Dropout Voltage Regulators

IEEE Transactions on Circuits and Systems II: Express Briefs, 2014
In this brief, a high-order temperature-compensated 0.6-V low-dropout voltage source (LDVS) is realized in standard 0.13- $\mu\hbox{m}$ CMOS technology. The LDVS operates at supply voltages down to 0.75 V and consumes only 39 $\mu\hbox{A}$ while providing up to 100 mA of load current. Gate-to-channel capacitance values of MOSFETs are employed
Hamed Aminzadeh, Mohammad R. Nabavi, Wouter A. Serdijn   +2 more
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Fractional Order Low–Dropout Voltage Regulator

2016 8th International Conference on Computational Intelligence and Communication Networks (CICN), 2016
The Internet of Things offers tremendous potential to increasingly harness wireless and portable systems in everyday life. Low-dropout (LDO) linear regulators are essential components in numerous wireless and portable electronic devices and their performance in systems can be very important, given the need to power such devices particularly in ...
Sean Rocke, Craig Ramlal, Arvind Singh
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Analysis of low-dropout regulator topologies for low-voltage regulation

2003 IEEE Conference on Electron Devices and Solid-State Circuits (IEEE Cat. No.03TH8668), 2004
The design considerations of integrated CMOS low-voltage low-dropout regulators are addressed in this paper. The limitations of a generic LDO based on dominant-pole compensation are discussed. Then, LDO with a voltage-buffer stage and the corresponding problems in low-voltage design are discussed.
null Sai Kit Lau, null Ka Nang Leung, P.K.T. Mok   +2 more
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Low dropout regulators

2015 IEEE Custom Integrated Circuits Conference (CICC), 2015
□ Output voltage generated using a resistive divider ▪ Fixed divide ratio -> sensitive to load current changes □ Feedback loop regulates R IN such that it is always a desired fraction of load current ▪ Output voltage is independent of load current.
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Design for Testability of Low Dropout Regulators

2021 IEEE 39th VLSI Test Symposium (VTS), 2021
Integrated LDOs are closed loop systems; characterization of their gain and bandwidth is critical. Generally, gain and bandwidth parameters are extracted from LDO design simulations. However, LDO loop parameter testing requires breaking the loop and injecting a test signal into the IC.
Anurag Tulsiram, William R. Eisenstadt
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A 0.5 V low-voltage low-dropout regulator

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), 2017
This work proposes a low-dropout (LDO) regulator to provide low supply voltage of 0.5 V with the input range from 0.7 V to 0.9 V. The reference voltage of this LDO regulator is generated with the zero temperature coefficient circuit composed by MOS transistors in the subthreshold condition.
Ding-Lan Shen, Ting-Ta Lee
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Design of a Low-Voltage Low-Dropout Regulator

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014
A low-voltage low-dropout (LDO) regulator that converts an input of 1 V to an output of 0.85–0.5 V, with 90-nm CMOS technology is proposed. A simple symmetric operational transconductance amplifier is used as the error amplifier (EA), with a current splitting technique adopted to boost the gain.
Chung-Hsun Huang, Ying-Ting Ma, Wei-Chen Liao   +2 more
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