Results 71 to 80 of about 1,714,265 (129)

Machine learning in an asynchronous machine

Conference Proceedings 1991 IEEE International Conference on Systems, Man, and Cybernetics, 2002
To give a broad view of machine learning, the authors describe the basic methods of learning and give examples of learning systems which illustrate these techniques. Some of the early research in the performance of machine learning systems is discussed.
J. Carter, J. Herath
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On the control of asynchronous machines with races

IEEE Transactions on Automatic Control, 2003
The problem of eliminating the effects of critical races on asynchronous machines is considered in a control theoretic context. State feedback controllers that eliminate the effects of critical races are developed. The results include necessary and sufficient conditions for the existence of such controllers and algorithms for their design.
Thomas E. Murphy, Xiaojun Geng, Jacob Hammer   +2 more
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A Fail-Safe Asynchronous Sequential Machine

IEEE Transactions on Computers, 1974
This paper examines the dynamic fault behavior of asynchronous sequential machines, specifically identifying the faults which cause critical races and hazards, and presents a state assignment technique leading to a machine that enters one of a small set of error states whenever a fault occurs.
William W. Patterson, Gernot Metze
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Fault-Tolerant Asynchronous Sequential Machines

IEEE Transactions on Computers, 1974
A general design technique for achieving single fault-tolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance,
Gary K. Maki, Dwight H. Sawin III
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Self-Synchronized Asynchronous Sequential Machines

IEEE Transactions on Computers, 1974
In this correspondence, a new circuit structure is proposed which basically supresses the possibility of hazards and critical races in asynchronous sequential machines. In contrast to many approaches which try to solve these problems by changing the form of the automaton model, we suggest a more general "hardware" solution.
Christian Rey, Jean G. Vaucher
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Fail-Safe Asynchronous Sequential Machines

IEEE Transactions on Computers, 1975
Fail-safe circuits are designed to assume a 1 (1-fail-safe) or a 0 (0-fail-safe) output state upon failure. This correspondence extends fault detection techniques previously presented [1] to include the design of fail-safe asynchronous sequential circuits.
Dwight H. Sawin III, Gary K. Maki
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MODELING OF ASYNCHRONOUS MACHINE

CAD/EDA, MODELING AND SIMULATION IN MODERN ELECTRONICS: COLLECTION OF SCIENTIFIC PAPERS OF THE III INTERNATIONAL SCIENTIFIC AND PRACTICAL CONFERENCE, 2019
This paper presents a mathematical model of a generalized asynchronous machine and its modeling in MATLAB ...
Anatoliy Afanasyev, Evgeniya Studneva
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Asynchronous Abstract Machines

Proceedings of the 9th International Workshop on Runtime and Operating Systems for Supercomputers, 2019
Today's systems offer an increasing number of processor cores, however, the chance to operate them efficiently by dedicating cores to specific tasks is often missed. Instead, mixed workloads are processed by each core which leads to system noise (i.e., interferences, scheduling overheads) and yields subpar performance, only.
Sebastian Maier, Timo Hönig, Peter Wägemann, Wolfgang Schröder-Preikschat   +3 more
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Synthesis of 3D asynchronous state machines

Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors, 2003
A synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple-input-change fundamental mode operation, is described. This implementation of burst-mode state machines uses standard combinational logic, generates low-latency outputs and guarantees freedom from hazards at the gate ...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick   +2 more
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Synthesis-for-initializability of asynchronous sequential machines

Proceedings International Test Conference 1996. Test and Design Validity, 2002
We present a new method for the synthesis-for initializability of asynchronous state machines. Unlike existing approaches, our method incorporates a state assignment step. State assignment is critical, since initializability may be precluded by poor choice of state assignment. Also, we present precise conditions on hazard-free logic, to insure that the
Montek Singh, Steven M. Nowick
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