Results 221 to 230 of about 1,347,779 (299)
Some of the next articles are maybe not open access.
2014
We finally are able to specify a multi-core MIPS machine, build it, and show that it works. Clearly the plan is to take pipelined MIPS machines from Chap. 7 and connect them to the shared memory system from Chap. 8. Before we can do this, however, we have to address a small technical problem: the pipelined machine was obtained by a transformation from ...
Mikhail Kovalev +2 more
openaire +2 more sources
We finally are able to specify a multi-core MIPS machine, build it, and show that it works. Clearly the plan is to take pipelined MIPS machines from Chap. 7 and connect them to the shared memory system from Chap. 8. Before we can do this, however, we have to address a small technical problem: the pipelined machine was obtained by a transformation from ...
Mikhail Kovalev +2 more
openaire +2 more sources
POWER7 multi-core processor design
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, 2009POWER series of processors are the building block for IBM's p-Series servers. With its leading edge microarchitecture, technology and efficient implementation, POWER processors are the dominating RISC processor technology today. POWER processors form the building block for IBM's p-Series servers, which have the largest UNIX marketshare.
B. Sinharoy
openaire +2 more sources
International Symposium on Computer Architecture, 2020
The open source RISC-V ISA has been quickly gaining momentum. This paper presents Xuantie-910, an industry leading 64-bit high performance embedded RISC-V processor from Alibaba T-Head division.
Chen Chen +15 more
semanticscholar +1 more source
The open source RISC-V ISA has been quickly gaining momentum. This paper presents Xuantie-910, an industry leading 64-bit high performance embedded RISC-V processor from Alibaba T-Head division.
Chen Chen +15 more
semanticscholar +1 more source
Nearly symmetric multi-core processors
Proceedings of the 11th ACM SIGOPS Asia-Pacific Workshop on Systems, 2020Multi-core processors are commonplace and continue to require rethinking (not only) in system software development. It is still difficult to operate several functionally identical computing cores efficiently. One misconception is to assume that functionally identical cores of a multi-core processor will behave non-functionally alike, especially at the ...
Stefan Reif +4 more
openaire +1 more source
Analytic Multi-Core Processor Model for Fast Design-Space Exploration
IEEE transactions on computers, 2018Simulators help computer architects optimize system designs. The limited performance of simulators even of moderate size and detail makes the approach infeasible for design-space exploration of future exascale systems. Analytic models, in contrast, offer
R. Jongerius +5 more
semanticscholar +1 more source
An Independent Task Scheduling Algorithm in Heterogeneous Multi-core Processor Environment
IEEE Advanced Information Technology, Electronic and Automation Control Conference, 2018Multi-core processor architecture is increasingly being used in high-performance computing. Task scheduling problem for performance heterogeneous multi-core processor is a well-known NP-complete problem.
Lindong Liu, Deyu Qi
semanticscholar +1 more source
2020
This section contains a moderately renovated proof of the main result of [KMP14] establishing the correctness of a multi core processor with pipelined processor cores.
Petro Lutsyk +2 more
openaire +1 more source
This section contains a moderately renovated proof of the main result of [KMP14] establishing the correctness of a multi core processor with pipelined processor cores.
Petro Lutsyk +2 more
openaire +1 more source
General-Purpose Multi-core Processors
2009During the past several decades, the general-purpose microprocessor industry has effectively leveraged Moore’s Law to offer continually increasing single-thread microprocessor performance and compelling new features. However, the amazing increase in performance was not free: many practical design constraints, especially power consumption, were pushed ...
Chuck Moore, Pat Conway
openaire +1 more source
Language identification using multi-core processors
Computer Speech & Language, 2012Graphics processing units (GPUs) provide substantial processing power for little cost. We explore the application of GPUs to speech pattern processing, using language identification (LID) to demonstrate their benefits. Realization of the full potential of GPUs requires both effective coding of predetermined algorithms, and, if there is a choice ...
A. Hanani, M.J. Carey, M.J. Russell
openaire +1 more source
DNPU: An Energy-Efficient Deep-Learning Processor with Heterogeneous Multi-Core Architecture
IEEE Micro, 2018An energy-efficient deep-learning processor called DNPU is proposed for the embedded processing of convolutional neural networks (CNNs) and recurrent neural networks (RNNs) in mobile platforms.
Dongjoo Shin +4 more
semanticscholar +1 more source