Results 81 to 90 of about 3,393 (217)

Ultra-Fast and Accurate Estimation of Large-Scale and Multi-Level Mesh-Based On-Chip Architectures Using Machine Learning and Multiprocessing

IEEE Access
Packet Switching On-Chip Network technology has taken over conventional bus-based on-chips since it combines multiple cores into a single chip, enabling the implementation of numerous complicated applications.
Anil Kumar, Basavaraj Talawar, S. Mahadevi   +2 more
doaj   +1 more source

Exploring GPU sharing techniques for edge AI smart city applications

ETRI Journal
The growing adoption of edge AI in smart city applications such as trafficmanagement, surveillance, and environmental monitoring necessitates effi-cient computational strategies to satisfy the requirements for low latency andhigh accuracy.
Sooyeon Woo, Jihwan Yeo, Jinhong Kim, Kyungwoon Lee   +3 more
doaj   +1 more source

Structural synthesis of parallel programs (Methodology and Tools) [PDF]

Computer Science Journal of Moldova, 1995
Concepts of structured programming and propositional program logics were anticipated in the systems of algorithmic algebras (SAAs) introduced by V.M.Glushkov in 1965.
G. Cejtlin, E. Jushchenko
doaj  

Tightly-Coupled Heterogeneous Multiprocessing

, 1997
This thesis focuses on identifying the relationship between the major variables which influence the effectiveness of heterogeneous multiprocessing and the resulting performance, as compared to a similar homogeneous multiprocessor.
Andrews, John Barrett
core  

K-ary n-cube based off-chip communications architecture for high-speed packet processors [PDF]

, 2005
A k-ary n-cube interconnect architecture is proposed, as an off-chip communications architecture for line cards, to increase the throughput of the currently used memory system. The k-ary n-cube architecture allows multiple packet processing elements on a
Kocak, Taskin, T. Kocak, Engel, J, Kocak, T, Engel, Jacob, J. Engel   +5 more
core   +1 more source

Symmetric Multiprocessing Workstations and Servers System-Designed for High

, 2014
A new family of workstations and servers provides enhanced system performance in several price classes. The HP 9000 Series 700 J-class workstations provide up to 2-way symmetric multiprocessing, while the HP 9000 Series 800 K-class servers (technical ...
Matt J. Harline, Low Cost
core  

Multiprocessing Extensions in SPUR Lisp

The authors describe their multiprocessing extensions to Common Lisp. They have added a few simple, expressive features on which one can build high-level constructs.
Larus, James, Semenzato, Luigi, Zorn, Benjamin, Ho, Kinson, Hilfinger, Paul   +4 more
core   +1 more source

Development of parallel algorithm of data processing in multiprocessor systems on examples of tasks of dynamics of industrial manipulation robot

RUDN Journal of Engineering Research, 2010
In this article the model of the multiprocessing system which allows to significantly speed up the implementation of modular algorithms for solving of direct and reverse tasks of dynamics of the industrial manipulation robot is considered.
A A Vnukov, M A Lisenkov
doaj  

Multiprocessing with microprocessors for power flow analyses

, 1982
This work explores the need for multiprocessing in the power industry. A suitable computer architecture for power system problems is presented. An efficient decomposition technique is developed to solve the problem parallely.
Ramanathan, Ramanathan
core  

Two Fundamental Limits on Dataflow Multiprocessing

, 1993
: This paper examines the argument for dataflow architectures in "Two Fundamental Issues in Multiprocessing[5]." We observe two key problems.
Klaus Erik Schauser, David E. Culler, Thorsten Von Eicken   +2 more
core