Results 191 to 200 of about 17,622 (230)

Generalized multiprocessor scheduling

1996
This paper presents some new results on homogeneous multi-processor scheduling. Given the lengths, precedences and speedup functions of a set of tasks, the optimal scheduling problem is to determine the number of processors assigned to each task and the task sequencing to minimize the completion time.
Li, Zhonghua, Kirkham, Chris C
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Microtasking on IBM multiprocessors

IBM Journal of Research and Development, 1986
The demand for very high computing performance has become increasingly common in many scientific and engineering environments. In addition to vector processing, parallel computing is now considered a useful way to enhance performance. However, parallel computing tends to be unpopular among users because, with presently available technology and software,
Paolo Carnevali, Piero Sguazzero, Vittorio Zecca   +2 more
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Memory Allocation for Multiprocessors

IEEE Transactions on Electronic Computers, 1967
In multiprocessor systems it is desirable to look for and allocate storage without extensive data moving. Two techniques for accomplishing this, associative memory techniques and indirect addressing techniques, are described. It is concluded that the two methods are similar in performance, but that indirect addressing is more economical.
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Multiprocessor join scheduling

IEEE Transactions on Knowledge and Data Engineering, 1993
A practical join processing strategy that allows effective utilization of arbitrary degrees of parallelism in both the I/O subsystem and join processing subsystems is presented. Analytic bounds on the minimum execution time, minimum number of processors, and processor utilization are presented along with bounds on the execution time, given a fixed ...
Marguerite C. Murphy, Doron Rotem
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A multiprocessor description language

Proceedings of the May 4-7, 1981, national computer conference on - AFIPS '81, 1981
A language for describing multiprocessor systems is presented. The language, called MPDL, provides a flexible and unambiguous model of concurrency and allows for hierarchical construction of concurrent systems. MPDL encourages the user to encapsulate interprocess synchronization and communication in a special component called a connector.
William T. Overman, Stephen D. Crocker, Vittal Kini   +2 more
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An ECL RISC multiprocessor

COMPCON Spring '91 Digest of Papers, 2002
The authors describe how an upgrade to the MIPS R6000 ECL chip set, the R6000A CPU and the R6020A SBC, implements a sophisticated coherent cache protocol to support multiple processor systems, and how software uses the system. Particular attention is given to the cache subsystem, the cache control attributes, the cache line states, and the software ...
Bob Foster, Curtis Alexander, Allen Roberts, David Roberts   +3 more
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Multicast in hypercube multiprocessors

Seventh Annual International Phoenix Conference on Computers an Communications. 1988 Conference Proceedings, 1990
Existing hypercube multiprocessors only support one-to-one interprocessor communication. However, multicast (one-to-many) communication is needed for executing many data-parallel algorithms. An optimal multicast algorithm should be able to minimize both the traffic generated and the time required to delivery a message.
Lan, Youran, Esfahanian, AbdolHossein, Ni, Lionel Ming-Shuan   +2 more
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Multiprocessors: Architecture and Applications

Computer, 1985
New developments related partly to the increasing availability of high-performance, 32-bit microprocessors favor the design of high-performance computing systems made of high-volume, low-cost components. The present paper provides an evaluation of the state of the art regarding multiprocessing and indicates some major research problems which must be ...
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The Balance multiprocessor system

IEEE Micro, 1988
A description is given of the architecture, operating system, and performance of Balance, a shared-memory, tightly coupled multiprocessor system. Balance can contain two to thirty 32-bit microprocessors with an aggregate performance of up to 21 million instructions per second (MIPS). Each processor has a private cache as well as a small local memory to
Shreekant S. Thakkar, Paul Gifford, Gary N. Fielland   +2 more
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A Facility for Simulating Multiprocessors

IEEE Micro, 1986
Simulation models are better than analytical ones for understanding systems that behave unpredictably. But no such models have been available for asynchronous parallel systems?a situation the Euclid simulator corrects.
James M. Butler, A. Yavuz Oruç
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