Results 271 to 280 of about 146,883 (325)
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APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285), 1999
This paper explores the fundamental limitations of neutral-point voltage balancing problem for different loading conditions of three level voltage source inverters. A new model in DQ coordinate frame utilizing current switching functions is developed, as a means to investigate theoretical limitations and lend more intuitive insight into the problem ...
N. Celanovic, D. Boroyevich
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This paper explores the fundamental limitations of neutral-point voltage balancing problem for different loading conditions of three level voltage source inverters. A new model in DQ coordinate frame utilizing current switching functions is developed, as a means to investigate theoretical limitations and lend more intuitive insight into the problem ...
N. Celanovic, D. Boroyevich
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IEEE transactions on industry applications, 2020
Single-phase three-level T-type inverter (3LT$^2$I) has revealed superior performances in many applications. However, it inevitably faces the challenge of high switching loss and imbalanced neutral-point voltage with conventional carrier based pulsewidth
Zhizhen Wang +4 more
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Single-phase three-level T-type inverter (3LT$^2$I) has revealed superior performances in many applications. However, it inevitably faces the challenge of high switching loss and imbalanced neutral-point voltage with conventional carrier based pulsewidth
Zhizhen Wang +4 more
semanticscholar +1 more source
Capacitor Voltage Balancing for Neutral Point Clamped Dual Active Bridge Converters
IEEE Transactions on Power Electronics, 2020A capacitor voltage balancing method is proposed for a full-bridge neutral point diode clamped (NPC) dual-active bridge (DAB) converter. In existing literature, capacitor voltage balancing is achieved by actively selecting between the small voltage vectors, i.e., connecting either the upper or the lower capacitor on the dc bus to the transformer ...
M. A. Awal +6 more
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2007 International Conference on Electrical Machines and Systems (ICEMS), 2007
This paper investigates the neutral point voltage balancing problem in three-level NPC PWM VSI theoretically. Current vector is introduced to model the disturbance of NP voltage due to middle voltage vectors and small voltage vectors. The ripple of NP voltage is consisting of two parts, one is low-frequency and the other is high frequency.
null Weidong Jiang +3 more
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This paper investigates the neutral point voltage balancing problem in three-level NPC PWM VSI theoretically. Current vector is introduced to model the disturbance of NP voltage due to middle voltage vectors and small voltage vectors. The ripple of NP voltage is consisting of two parts, one is low-frequency and the other is high frequency.
null Weidong Jiang +3 more
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IEEE 2002 28th Annual Conference of the Industrial Electronics Society. IECON 02, 2003
In this paper, the evolution and the control options of the neutral point potential in NPC inverters with SVPWM modulation are analysed. In this analysis, the different components that can be found in the phase current are taken into account: fundamental, DC current and harmonics.
O. Alonso +4 more
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In this paper, the evolution and the control options of the neutral point potential in NPC inverters with SVPWM modulation are analysed. In this analysis, the different components that can be found in the phase current are taken into account: fundamental, DC current and harmonics.
O. Alonso +4 more
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IEEE Transactions on Industrial Electronics, 2019
According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E ...
Kewei Chen, Weidong Jiang, Peixia Wang
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According to different clamping methods, nine modes (C_MODE1-9) of the traditional discontinuous pulsewidth modulation (DPWM) for neutral-point-clamped three-level converter have been revealed. Since traditional DPWM cannot balance neutral point (NP) voltage under the full range of modulation index (MI) and power factor (PF), two extended modes (E ...
Kewei Chen, Weidong Jiang, Peixia Wang
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A Generalized Design Framework for Neutral Point Voltage Balance of Three-Phase Vienna Rectifiers
IEEE transactions on power electronics, 2019This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods ...
Xing Li +6 more
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IEEE transactions on power electronics
Ensuring a high reliability of three-level T-type inverters in case of open-circuit faults is of great significance for their industrial applications, which can be achieved by adopting a high performance open-circuit fault tolerant control.
Mingzhe Wu +5 more
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Ensuring a high reliability of three-level T-type inverters in case of open-circuit faults is of great significance for their industrial applications, which can be achieved by adopting a high performance open-circuit fault tolerant control.
Mingzhe Wu +5 more
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IEEE transactions on industrial electronics (1982. Print), 2019
The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper.
Weidong Jiang +6 more
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The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper.
Weidong Jiang +6 more
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2016 IEEE Energy Conversion Congress and Exposition (ECCE), 2016
Common mode voltage output is closely associated with switching states in three-phase three-wire neutral-point clamped inverter. Detailed analysis shows avoiding redundant states can effectively improve the common mode voltage, so this paper proposes a pulse width modulation (PWM) technique with zero redundant states to reduce the common mode voltage ...
Meng-jiang Tsai +4 more
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Common mode voltage output is closely associated with switching states in three-phase three-wire neutral-point clamped inverter. Detailed analysis shows avoiding redundant states can effectively improve the common mode voltage, so this paper proposes a pulse width modulation (PWM) technique with zero redundant states to reduce the common mode voltage ...
Meng-jiang Tsai +4 more
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