Results 21 to 30 of about 239 (84)

Spectral Testing of Digital Circuits

open access: yesVLSI Design, Volume 14, Issue 1, Page 83-105, 2002., 2002
Fault detection techniques using data compression methods have evolved during the last few years. Considerable work using individual Walsh spectral coefficients has been reported. In this paper, the application of spectral methods in testing of digital circuits with the emphasis on their usage for both input and output test compaction of digital ...
Bogdan J. Falkowski
wiley   +1 more source

A symbolic approach to the verification and enforcement of current‐state opacity using labelled Petri nets

open access: yesIET Control Theory &Applications, Volume 18, Issue 2, Page 171-183, January 2024.
This work proposes a symbolic method to verify and enforce the current‐state opacity of labelled Petri nets (LPNs). To mitigate the computational overheads, we propose a binary decision diagram‐based method to efficiently model the structure and behaviour of an LPN.
Kun Peng, Yufeng Chen, Zhiwu Li
wiley   +1 more source

A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model

open access: yesVLSI Design, Volume 12, Issue 1, Page 69-79, 2001., 2001
Our aim is the development of a novel probabilistic method to estimate the power consumption of a combinational circuit under real gate delay model handling temporal, structural and input pattern dependencies. The chosen gate delay model allows handling both the functional and spurious transitions.
G. Theodoridis   +3 more
wiley   +1 more source

Error Resilient OBDDs [PDF]

open access: yes, 2013
Ordered Binary Decision Diagrams (OBDDs) are a widely used data structure for Boolean function manipulation. In particular, OBDDs are commonly used in CAD for the synthesis and verification of integrated circuits.
Lago Lorenzo   +2 more
core   +3 more sources

A Fast and Accurate Method of Power Estimation for Logic Level Networks

open access: yesVLSI Design, Volume 12, Issue 2, Page 205-219, 2001., 2001
A method for estimating the power consumption of multilevel combinational networks is introduced. The proposed method has as inputs the signal probabilities, the data correlations of the primary inputs and the structure of the circuit, and consists of two major steps: (i) the calculation of the switching activity on an individual gate and (ii) the ...
G. Theodoridis   +3 more
wiley   +1 more source

Building free Binary Decision Diagrams using SAT solvers [PDF]

open access: yes, 2007
Free Binary Decision Diagrams (FBDDs) are a data structure for the representation of Boolean functions. In contrast to Ordered Binary Decision Diagrams (OBDDs) FBDDs allow different variable orderings along each path.
Görschwin Fey   +2 more
core   +1 more source

Model‐integrated Tools for the Design of Dynamically Reconfigurable Systems

open access: yesVLSI Design, Volume 10, Issue 3, Page 281-306, 2000., 2000
Several classes of modern applications demand very high performance from systems with minimal resources. These applications must also be flexible to operate in a rapidly changing environment. Achieving high performance from limited resources demands application‐specific architectures, while flexibility requires architectural adaptation capabilities ...
Ted Bapty   +4 more
wiley   +1 more source

Comparing BDD and SAT based techniques for model checking Chaum's Dining Cryptographers Protocol [PDF]

open access: yes, 2006
We analyse different versions of the Dining Cryptographers protocol by means of automatic verification via model checking. Specifically we model the protocol in terms of a network of communicating automata and verify that the protocol meets the anonymity
Raimondi, F.   +5 more
core  

Logic Synthesis for a Regular Layout

open access: yesVLSI Design, Volume 10, Issue 1, Page 35-55, 1999., 1998
New algorithms for generating a regular two‐dimensional layout representation for multi‐output, incompletely specified Boolean functions, called, Pseudo‐Symmetric Binary Decision Diagrams (PSBDDs), are presented. The regular structure of the function representation allows accurate prediction of post‐layout areas and delays before the layout is ...
Malgorzata Chrzanowska-Jeske   +2 more
wiley   +1 more source

Terminological Reasoning in SHIQ with Ordered Binary Decision Diagrams [PDF]

open access: yes, 2008
We present a new algorithm for reasoning in the description logic SHIQ, which is the most prominent fragment of the Web Ontology Language OWL. The algorithm is based on ordered binary decision diagrams (OBDDs) as a data structure for storing and ...
Krotzsch, Markus   +2 more
core  

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