Results 121 to 130 of about 505 (135)

Hybrid CMOS-OxRAM based 4T-2R NVSRAM with efficient programming scheme

2016 16th Non-Volatile Memory Technology Symposium (NVMTS), 2016
In this paper, we present an OxRAM based compact 4T-2R NVSRAM design with a novel efficient programming scheme to achieve low-power and low area footprint. 3 nm thick HfOx based OxRAM devices and 90 nm CMOS technology node were used for all simulations.
Swatilekha Majumdar, Sandeep Kaur Kingra, Manan Suri, Manish Tikyani   +3 more
openaire   +1 more source

Resistive Switching Model of OxRAM Devices Based on Intrinsic Electrical Parameters

2019 Latin American Electron Devices Conference (LAEDC), 2019
In this work, a model for the resistive switching of ReRAM devices that considers the electrical signal of the measurement element is developed. This model works for bipolar devices that have filamentary-type conduction and it is based on the circuit representation of the conductive filament (CF).
Guitarra, Silvana, Trojman, Lionel, Raymond, Laurent   +2 more
openaire   +1 more source

Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop

2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017
With the introduction of the Internet of Things (IoT), power consumption became a major design issue in modern system-on-chips. In advanced technologies, leakage power has become a dominant component, especially during sleep periods. Leakage mainly comes from volatile memory elements, e.g., flip-flops that cannot be power-gated in order to retain their
Nataraj, M., Levisse, A., Giraud, B., Noel, J.P., Meinerzhagen, P., Portal, Jean-Michel, Gaillardon, P.-E.   +6 more
openaire   +2 more sources

Evaluation of OxRAM cell variability impact on memory performances through electrical simulations

2011 11th Annual Non-Volatile Memory Technology Symposium Proceeding, 2011
An investigation in the impact of Oxide-based Resistive Memory RAM devices (OxRRAM) variability on the memory array performances is proposed. Variability in advanced IC designs has emerged as a roadblock and significant efforts of process and design engineers are required to decrease its impact. This is especially true for OxRRAM memory, combining high
H. Aziza, M. Bocquet, J-M. Portal, C. Muller   +3 more
openaire   +1 more source

Binary OxRAM/CBRAM Memories for Efficient Implementations of Embedded Neuromorphic Circuits

2017
This chapter describes an artificial synapse composed of multiple binary resistive RAM (RRAM) cells connected in parallel, thereby providing synaptic analog behavior. The vertical RRAM technology is presented as a possible solution to gain area by realizing one pillar per synapse.
Vianello, Elisa, Werner, Thilo, Piccolboni, Giuseppe, Garbin, Daniele, Bichler, Olivier, Molas, Gabriel, Portal, Jean-Michel, Yvert, Blaise, de Salvo, Barbara, Perniola, Luca   +9 more
openaire   +2 more sources

Failure of Weibull distribution to represent switching statistics in OxRAM

Microelectronic Engineering, 2017
Considering the reasonable similarity in the physical mechanisms governing oxide breakdown and filamentary resistive switching, the use of the Weibull distribution has been widespread in the RRAM community for describing the stochastics of Forming, SET, RESET and read disturb data sets.
openaire   +1 more source

Reliability and Variability of 1S1R OxRAM-OTS for High Density Crossbar Integration

2019 IEEE International Electron Devices Meeting (IEDM), 2019
HfO 2 OxRAM was co-integrated with an optimized OTS back-end selector in 1S1R memory arrays showing outstanding performances. Up to 3 decades of current window margin and 5 decades of selectivity were achieved. More than 106 programming, 108 reading and 109 read disturb cycles were demonstrated.
Robayo, D. Alfaro, Deleruyelle, D., Vianello, E., Castellani, N., Ciampolini, L., Giraud, B., Cagli, C., Ghibaudo, G., Nowak, E., Molas, G., Sassine, G., Lopez, J. Minguet, Grenouillet, L., Verdy, A., Navarro, G., Bernard, M., Esmanhotto, E., Carabasse, C.   +17 more
openaire   +2 more sources

OxRAM-based pulsed latch for non-volatile flip-flop in 28nm FDSOI

2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014
Emerging connected devices operating on battery or harvested energy sources highlight the need for ultra-low standby power design. Including non-volatility in flip-flops (FF) allows nullifying the power consumption in sleep mode, while maintaining the system state.
Alexandre Levisse, Natalija Jovanovic, Elisa Vianello, Jean-Michel Portal, Olivier Thomas   +4 more
openaire   +1 more source

CMOS-OxRAM Based Hybrid Nonvolatile SRAM and Flip-Flop: Circuit Implementations

2019
A critical technological challenge over the past few decades has been to achieve low-power operation without sacrificing performance. This led to the development of computing units that can normally be turned off when not in use and turned on instantly with full performance, when required thereby helping in eliminating leakage power.
Swatilekha Majumdar, Sandeep Kaur Kingra, Manan Suri   +2 more
openaire   +1 more source

Compact MEOL OxRAM with 14 Conductance Levels for Dense Embedded Inference Computing

2025 IEEE International Reliability Physics Symposium (IRPS)
For the first time, a compact 1T1R memory cell with 14 conductance levels is demonstrated in 28nm node technology. The HfO2-based OxRAM is integrated in the 40nm×40nm drain contact of GO1 FDSOI transistors, opening the way towards memory arrays with 0.0357µm2 bitcell area.
Minguet Lopez, Joel, Barraud, Sylvain, Dampfhoffer, Manon, Souhaite, Aurélie, Dubreuil, Théophile, Pedini, Jean-Michel, Comboroure, Corinne, Gharbi, Ahmed, Boulard, Francois, Castan, Clément, Lambert, Amélie, Andrieu, François   +11 more
openaire   +2 more sources