Results 101 to 110 of about 1,504,271 (353)
Image Processor Using 3D-DWT as Part of Health Care Management System [PDF]
This paper presents a low power and high speed 3D-DWT (three-dimensional discrete wavelet transform) architecture using stacked silicon dies for image compression of medical images.
Kyung-Chang Park+7 more
doaj
This review synthesizes the evolution of radiative heat transfer, emphasizing the transition from far‐field to near‐field regimes. Traditional frameworks, such as Planck's law, are revisited alongside modern innovations like fluctuational electrodynamics. Applications span nanoscale thermal management, energy harvesting, and thermophotovoltaic systems.
Ambali Alade Odebowale+6 more
wiley +1 more source
A Simulation Accelerating Method Based on CUDA with Kepler GPU
An accelerating method based on CUDA(compute unified device architecture)with Kepler GPU(graphics processing unit)was proposed to speed up the DFT(discrete Fourier transform)processing in the communication simulation platform.Based on this method,the ...
Bingjun Han, Shiming Huang, Ying Du
doaj +2 more sources
Experimental Evidence of Power Efficiency due to Architecture in Cellular Processor Array Chips [PDF]
Speeding up algorithm execution can be achieved by increasing the number of processing cores working in parallel. Of course, this speedup is limited by the degree to which the algorithm can be parallelized.
Carmona Galán, Ricardo+2 more
core +1 more source
Parallel processing relies on a distributed, low-dimensional cortico-cerebellar architecture
Eli J. Müller+8 more
doaj +1 more source
Fault-tolerant computer architecture based on INMOS transputer processor [PDF]
Redundant processing was used for several years in mission flight systems. In these systems, more than one processor performs the same task at the same time but only one processor is actually in real use.
Ortiz, Jorge L.
core +1 more source
Efficient algorithms for memory and processor allocation in parallel processing systems [PDF]
In this dissertation,optimal memory and processor allocation algorithms for parallel database processing are presented. Optimal memory allocation is one of the most important factors for preforming effective database query processing.
Chin Ko, 陳 幸
core
The relationship between primary polymer structure and pattern quality in the directed self‐assembly of chemically modified polystyrene‐block‐poly(methyl methacrylate) derivatives is explored. The perpendicular lamellae are aligned, with a periodicity below 20 nm. No parallel orientations or dislocations form, and line patterns are well defined over an
Shinsuke Maekawa+8 more
wiley +1 more source
Signal compression in radar using FPGA
We present the hardware implementation of radar real time processing procedures using a simple, fast technique based on FPGA (Field Programmable Gate Array) architecture.
Enrique Escamilla Hernández+4 more
doaj +1 more source
An optimal scheduling method for parallel processing system of array architecture [PDF]
Koichiro Ito, T. Iwata, Hiroaki Kunieda
openalex +1 more source