Results 71 to 80 of about 32,736 (268)

Parallel Power Flow Computation Trends and Applications: A Review Focusing on GPU

Energies, 2020
A power flow study aims to analyze a power system by obtaining the voltage and phase angle of buses inside the power system. Power flow computation basically uses a numerical method to solve a nonlinear system, which takes a certain amount of time ...
Dong-Hee Yoon, Youngsun Han
doaj   +1 more source

Triple‐Level Content‐Addressable Vertical NAND Flash Memory

Advanced Science, EarlyView.
Commercial triple‐level‐cell V‐NAND flash memory is transformed into a compact content‐addressable memory by directly exploiting its eight threshold‐voltage states. A parity‐split search scheme preserves storage density while enabling reliable multi‐level and don't‐care matching. Parallel word‐line search delivers up to 24‐fold higher throughput and 54.
Sung‐Ho Park, Jiseong Im, Yeongheon Yang, Ryun‐Han Koo, Jonghyun Ko, Mingyun Oh, Dongbeen Shin, Gyuweon Jung, Jong‐Ho Lee   +8 more
wiley   +1 more source

Customized Itinerant Frequency Combs by Cascaded Nonlinear Effects

Advanced Science, EarlyView.
A cascaded third‐order nonlinear system generates an itinerant frequency comb with the comb center frequency decoupled from the cavity resonance. This enables arbitrary spectral scaling, flexible spacing adjustments, and real‐time central‐frequency engineering, allowing comb splicing and subdivision. The resulting versatility and reconfigurability open
Yi Wang, Yulong Liu, Zeji Li, Wenyan Wang, Sihan Wang, Cheng Wang, Jingwei Zhou, Jie‐Qiao Liao, Tiefu Li   +8 more
wiley   +1 more source

Two‐Dimensional Flash Memory: Materials, Interfaces, and Storage–Computing Convergence

Advanced Science, EarlyView.
We systematically summarize recent advances in 2D flash memory, highlighting how interface and material engineering can overcome the conventional trade‐offs among speed, power consumption, and reliability in silicon‐based flash, and outlining its potential for high‐performance memory and in‐memory computing applications.
Zhiyuan Wang, Fanyi Meng, Fanying Meng, Shida Huo, Junxi Xu, Yaohui Wang, Yuexuan Ma, Yuan Xie, Xiaodong Hu, Caofeng Pan, Enxiu Wu   +10 more
wiley   +1 more source

Hardware Acceleration of Stochastic Neural Networks Enabled by Bit‐Cell Level Co‐Design of Magnetic Tunnel Junctions

Advanced Science, EarlyView.
An MTJ‐based probabilistic processing‐in‐memory architecture unites nonvolatile storage, local entropy generation, and stochastic computation within each memory cell. Stored multi‐bit weights are converted directly into programmable stochastic bitstreams, enabling neural‐network inference, adaptive Ising optimization, and uncertainty‐aware Bayesian ...
Qiuyuan Wang, Dooyong Koh, Brooke McGoldrick, Tudor Mocioi, Yabin Fan, Marc Baldo, Luqiao Liu   +6 more
wiley   +1 more source

On the Role of Preprocessing and Memristor Dynamics in Reservoir Computing for Image Classification

Advanced Electronic Materials, EarlyView.
ABSTRACT Reservoir computing (RC) is an emerging recurrent neural network architecture that has attracted growing attention for its low training cost and modest hardware requirements. Memristor‐based circuits are particularly promising for RC, as their intrinsic dynamics can reduce network size and parameter overhead in tasks such as time‐series ...
Rishona Daniels, Duna Wattad, Ronny Ronen, David Saad, Shahar Kvatinsky   +4 more
wiley   +1 more source

Figures of Argument (OSSA 2005 Keynote Address)

Informal Logic, 2004
From the seventeenth through the nineteenth centuries, scientists such as Kekule, Mendel, Lavoisier and Harvey argued for insights that depended critically on antithetical expressions and reasoning.
Jeanne Fahnestock
doaj   +1 more source

Experimental Demonstration of Temporally Aware Fault‐Tolerant Sensor Fusion Using Memristive Associative Learning

Advanced Electronic Materials, EarlyView.
In dynamic driving scenarios, the proposed approach ensures only temporally aligned sensor inputs to make driving decisions, preventing false activations. By enabling selective hardware‐level learning, it achieves fast, reliable responses under noisy conditions.
Kapil Bhardwaj, Ashfak Nehal, Dmitrii Semenov, Roman Sotner, Sayani Majumdar   +4 more
wiley   +1 more source

Stochastic‐MTJ Sampler Arrays for In‐Array Monte–Carlo Estimation

Advanced Electronic Materials, EarlyView.
A low‐energy‐barrier magnetic tunnel junction array is operated as a probability‐domain sampler: each cell's random switching, programmed through a shared digital‐to‐analog converter, makes the per‐column multiply–accumulate an unbiased Monte–Carlo expectation estimator that returns both a mean and a calibrated uncertainty.
Ran Zhang, Nellie Laleni, Sina Ranjbar, Andreas Tsiougkos, Nandakishor Yadav, Vasilis Pavlidis, Thomas Kämpfe   +6 more
wiley   +1 more source

Performance Analysis of High Throughput MAP Decoder for Turbo Codes and Self Concatenated Convolutional Codes

IEEE Access, 2019
The effect of parallelism on Bit Error Rate (BER) performance of Turbo Code (TC) and Self Concatenated Convolutional Code (SECCC) with different levels of parallelism and frame sizes is investigated. Next Iteration Initialization (NII) method is employed
Farzana Shaheen, Muhammad Fasih Uddin Butt, Shahrukh Agha, Soon Xin Ng, Robert G. Maunder   +4 more
doaj   +1 more source