Results 201 to 210 of about 8,403,038 (296)

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

open access: yesAdvanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez   +12 more
wiley   +1 more source

Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

open access: yesAdvanced Electronic Materials, EarlyView.
This review investigates the suitability of various emerging memory technologies as compute‐in‐memory hardware for artificial intelligence (AI) applications. Distinct requirements for training‐ and inference‐centric computing are discussed, spanning device physics, materials, and system integration.
Yoonho Cho   +6 more
wiley   +1 more source

Enabling Quantum‐Compatible Nonvolatile Memory: Cryogenic Evaluation of 1T1R HfO2‐Based RRAM From 300 to 1.5 K

open access: yesAdvanced Electronic Materials, EarlyView.
Resistive memory devices are explored for operation at extremely low temperatures relevant to quantum computing. The study reveals how transistor behavior strongly influences memory performance under cryogenic conditions and introduces an optimized programming strategy.
Emilio Pérez‐Bosch Quesada   +11 more
wiley   +1 more source

Efficient In‐Hardware Matrix–Vector Multiplication and Addition Exploiting Bilinearity of Schottky Barrier Transistors Processed on Industrial FDSOI

open access: yesAdvanced Electronic Materials, EarlyView.
ABSTRACT Machine learning and Artificial Intelligence (AI) tasks have stretched traditional hardware to its limits. In‐hardware computation is a novel approach that aims to run complex operations, such as matrix–vector multiplication, directly at the device level for increased efficiency.
Juan P. Martinez   +10 more
wiley   +1 more source

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