Results 211 to 220 of about 19,243 (241)
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A novel zero dead zone PFD and efficient CP for PLL applications
, 2018Tayebeh Azadmousavi +3 more
semanticscholar +1 more source
Analysis and design of low power nonlinear PFD architectures for a fast locking PLL
IEEE Students’ Technology Symposium, 2016K. K. Abdul Majeed, B. J. Kailath
semanticscholar +1 more source
Generalizing PFD formulas of IEC 61508 for KooN configurations.
ISA transactions, 2015H. Jahanian
semanticscholar +1 more source
2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), 2015
Manas Kumar Hati, T. K. Bhattacharyya
semanticscholar +1 more source
Manas Kumar Hati, T. K. Bhattacharyya
semanticscholar +1 more source
Using D flip-flop with reset terminal to design PFD in QCA nanotechnology
International Journal of Electronics, 2020Mohammad Gholami
exaly
Low power, high frequency, free dead zone PFD for a PLL design
IEEE Faible Tension Faible Consommation, 2013K. K. Abdul Majeed, B. J. Kailath
semanticscholar +1 more source
An Efficient Implementation of an Effective PFD-CP for Low Power Low-Jitter CP-PLL
Lecture Notes in Electrical Engineering, 2022Abdelmalik Bouyahyaoui
exaly
Extension of ISA TR84.00.02 PFD equations to KooN architectures
Reliability Engineering & System Safety, 2010L. F. Oliveira, R. Abramovitch
semanticscholar +1 more source

