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Pipelined adders

IEEE Transactions on Computers, 1996
Summary: A well-known scheme for obtaining high throughput adders is a pipeline in which each stage contains an array of half-adders performing a carry-save addition. This paper shows that other schemes can be designed, based on the idea of pipelining a serial-input adder or a ripple-carry adder.
L. Dadda, V. Piuri
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Pipeline Architecture

ACM Computing Surveys, 1977
Pipelined computer architecture has received considerable attention since the 1960s when the need for faster and more cost-effective systems became critical. The merit of pipelining is that it can help to match the speeds of various subsystems without duplicating the cost of the entire system involved.
Ramamoorthy, C. V., Li, H. F.
openaire   +2 more sources

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