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Register-sensitive software pipelining

Proceedings of the First Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing, 2002
We propose an integrated approach for register-sensitive software pipelining. In this approach, the heuristics proposed in the stage scheduling method of A.E. Eichenberger and E.S. Davidson (1995) are integrated with the iterative scheduling method to obtain schedules with high initiation rate and low register requirements.
A.K. Dani   +2 more
openaire   +1 more source

SWE-smith: Scaling Data for Software Engineering Agents

arXiv.org
Despite recent progress in Language Models (LMs) for software engineering, collecting training data remains a significant pain point. Existing datasets are small, with at most 1,000s of training instances from 11 or fewer GitHub repositories.
John Yang   +9 more
semanticscholar   +1 more source

A high-performance software graphics pipeline architecture for the GPU

ACM Transactions on Graphics, 2018
In this paper, we present a real-time graphics pipeline implemented entirely in software on a modern GPU. As opposed to previous work, our approach features a fully-concurrent, multi-stage, streaming design with dynamic load balancing, capable of ...
Michael Kenzel   +3 more
semanticscholar   +1 more source

Runtime resource allocation for software pipelines

Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems, 2013
Efficiently allocating the computational resources of many-core systems is one of the most prominent challenges, especially when resource requirements may vary unpredictably at runtime. This is even more challenging when facing unreliable cores—a scenario that becomes common as the number of cores increases and integration sizes shrink.
Jahn, Janmartin   +4 more
openaire   +3 more sources

Ultra-pipelining: an efficient software pipelining algorithm

Digest of Papers. Compcon Spring, 2002
A compiler technique for utilizing instruction-level parallelism is presented. The software pipelining algorithm presented concentrates on innermost loops with array accesses dominating variable references. Dependence graphs labeled with either direction or distance information are provided as input to the pipelining algorithm. In the first step of the
openaire   +1 more source

SwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection

Micro, 2018
Intra-thread instruction duplication offers straightforward and effective pipeline error detection for data-intensive processors. However, software-enforced instruction duplication uses explicit checking instructions, roughly doubles program register ...
Michael B. Sullivan   +4 more
semanticscholar   +1 more source

OPTIMAL SOFTWARE PIPELINING UNDER RESOURCE CONSTRAINTS

International Journal of Foundations of Computer Science, 2001
In this paper we present a novel approach to find an optimum loop schedule under consideration of limited resources. The initiation interval λ is assumed to be a rational number. Our approach is formulated as a single optimization problem that can be solved using integer linear programming.
Fimmel, Dirk, Müller, Jan
openaire   +2 more sources

Software Data Prefetching for Software Pipelined Loops

Journal of Parallel and Distributed Computing, 1999
This paper focuses on the interaction between software prefetching (both binding and nonbinding prefetch) and software pipelining for statically scheduled machines. First, it is shown that evaluating software pipelined schedules without considering memory effects can be rather inaccurate due to stalls caused by dependences with memory instructions ...
Jesús Sánchez, Antonio González
openaire   +1 more source

Complementing software pipelining with software thread integration

Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, 2005
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in high-performance embedded applications such as digital signal processing. Software thread integration (STI) can often improve the performance of looping code in cases where software pipelining performs poorly or fails.
Won So, Alexander G. Dean
openaire   +1 more source

Just-In-Time Software Pipelining

Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014
Software pipelining exploits instruction-level parallelism from loops. In static compilers, it has been one of the most efficient optimizations for wide-issue architectures. However, the compilation time is at least O(|V|3) (V: the set of operations in a loop) and in the worst-case exponential.
Hongbo Rong   +3 more
openaire   +1 more source

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