Optimization of PLL frequency synthesizer [PDF]
The influence of different configurations of phase-locked loop frequency (PLL) with integer coefficients on parameters of the PLL loop of the frequency synthesizer is considered.
G. A. Koshuk +2 more
doaj +1 more source
Time-Based High-Pass, Low-Pass, Shelf, and Notch Filters
This paper presents formulations for time-based first-order and second-order high-pass, shelf, and notch filters. These formulations are an extension to the existing literature where low-pass filters are already developed using a multiphase controlled ...
Nicolai J. Dahl +2 more
doaj +1 more source
Design and Implementation of High Frequency and Low-Power Phase-locked Loop
Phase-locked loop (PLL) operates at a high frequency and due to the increased switching rate of the circuits, the power consumption is high. Designing a PLL which consumes less power without compromising the frequency of operation is essential.
Premananda B. S. +3 more
doaj +1 more source
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops [PDF]
This brief analyzes the jitter as well as the power dissipation of phase-locked loops (PLLs). It aims at defining a benchmark figure-of-merit (FOM) that is compatible with the well-known FOM for oscillators but now extended to an entire PLL.
Gao, X. +3 more
core +2 more sources
Modeling and Robust Control of a Grid Connected Direct Driven PMSG Wind Turbine By ADRC
In this paper, we present the modeling and control of a grid connected Variable Speed Wind Energy Conversion System (VS-WECS) based on a Direct Driven Permanent Magnet Synchronous Generator (DD-PMSG).
Imad Aboudrar +3 more
doaj +1 more source
An advanced hybrid pre-filtering/in-loop-filtering based PLL under adverse grid conditions
The amplitude, frequency and phase angle of the grid voltage are essential three components to ensure synchronization for grid interactive inverters.
Fehmi Sevilmiş, Hulusi Karaca
doaj +1 more source
A Low Noise Sub-Sampling PLL in Which Divider Noise Is Eliminated and PD-CP Noise Is not multiplied by N^2 [PDF]
This paper presents a 2.2-GHz low jitter sub-sampling based PLL. It uses a phase-detector/charge-pump (PD/CP)that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N2
Bohsali, Mounhir +3 more
core +3 more sources
Influence of PLL on synthetic inertia of DFIG wind turbine in droop controlled microgrids
Islanded microgrids allow for a continuous supply of customers even when there is an outage in the bulk power system. The frequency control and stability in microgrids is an ongoing field of research.
Simon Eberlein, Krzysztof Rudion
doaj +1 more source
Modeling and frequency characteristic analysis of DSOGI-PLL in dq reference frame
Dual second-order generalized integrator phase-locked loop (DSOGI-PLL) is widely used in grid-connected system for grid synchronization because of its simple implementation and good filtering capability.
Yongxin Zhang +5 more
doaj +1 more source
Interacting Dirac fermions under spatially alternating pseudo-magnetic field: Realization of spontaneous quantum Hall effect [PDF]
Both topological crystalline insulators surfaces and graphene host multi-valley massless Dirac fermions which are not pinned to a high-symmetry point of the Brillouin zone.
Fu, Liang, Venderbos, Jörn W. F.
core +2 more sources

