Results 51 to 60 of about 148,748 (316)

A Physiological Microfluidic Blood–Brain‐Barrier Model for In Vitro Study of Nanoparticle Trafficking and Accumulation

open access: yesAdvanced Healthcare Materials, EarlyView.
A human microfluidic blood‐brain barrier (mBBB) model enables spatially resolved comparison of nanoparticle trafficking. Extracellular vesicles (EVs), liposomes, and nanoplastics exhibit distinct transport and disruption behaviors, revealing that membrane composition and uptake pathways govern BBB interaction.
Bryan B. Nguyen   +9 more
wiley   +1 more source

Comparison of Synchronization Techniques Under Distorted Grid Conditions

open access: yesIEEE Access, 2019
In grid-connected power converter applications, the phase-locked loop (PLL) is probably the most widely used grid synchronization technique, owing to its simple implementation. However, in power grids some very common problems, such as voltage distortion,
Ikram Ullah, Muhammad Ashraf
doaj   +1 more source

A system-level method for hardening phase-locked loop to single-event effects

open access: yesMaterials Research Express, 2022
To mitigate the sensitivity of the charge pump in a traditional Phase-Locked Loop(PLL), a single-event-hardened PLL architecture with a proportional and integral path is proposed.
Bin Liang   +6 more
doaj   +1 more source

The PLL [PDF]

open access: yes, 2017
В статье приведены результаты исследований системы фазовой автоподстройки частоты с учетом и без учета аддитивных помех, сопровождающих эталонный сигнал.
Дядюра, М. О.   +2 more
core  

Limitations of the classical phase-locked loop analysis

open access: yes, 2015
Nonlinear analysis of the classical phase-locked loop (PLL) is a challenging task. In classical engineering literature simplified mathematical models and simulation are widely used for its study.
Kuznetsov, N. V.   +5 more
core   +1 more source

Low-Jitter Clock Multiplication: a Comparioson between PLLs and DLLs [PDF]

open access: yes, 2002
This paper shows that, for a given power budget, a practical phase-locked loop (PLL)-based clock multiplier generates less jitter than a delay-locked loop (DLL) equivalent. This is due to the fact that the delay cells in a PLL ring-oscillator can consume
Beek, Remco C.H. van de   +3 more
core   +2 more sources

Thermally Modulated Metasurface Sensor for Dynamic and Time‐Resolved Isolation of Extracellular Vesicles

open access: yesAdvanced Materials, EarlyView.
A thermally adaptive plasmonic metasurface, functionalized with poly(N‐isopropylacrylamide) (PNIPAM) and anti‐CD63 antibodies, enables precise, on‐demand capture and release of extracellular vesicles (EVs). Delivering high recovery, improved purity, and intact vesicle structure, the platform offers a versatile, label‐free solution for real‐time EV ...
Beyza Nur Kucuk   +7 more
wiley   +1 more source

Sub-sampling PLL techniques [PDF]

open access: yes2015 IEEE Custom Integrated Circuits Conference (CICC), 2015
The phase-locked-loop (PLL) is a ubiquitous component in modern ICs due to its versatility. It can, for instance, be used for clock generation, frequency synthesis, frequency modulation and demodulation, clock and data recovery, synchronization, and spread spectrum signal generation, in applications like high-performance analog-to-digital converters ...
Xiang Gao 0002   +2 more
openaire   +2 more sources

Gold Nanorods in Cardiac Millitissues: Assessing Mechanical and Contractile Dynamics in a Living Engineering Myocardium Model

open access: yesAdvanced Materials Technologies, EarlyView.
This study presents a novel platform for assessing the active mechanical behavior of living cardiac microbundles through localized nanoindentation, integrated with temperature regulation and dual‐camera imaging systems. The developed system enables quantitative evaluation of dynamic micromechanics in engineered cardiac tissues in vitro, offering ...
Lihua Lou   +4 more
wiley   +1 more source

A mode switching based transient ride‐through phase‐locked loop

open access: yesIET Power Electronics, 2023
In the case of grid voltage quality problems, the traditional phase‐locked loop (PLL) is hard to detect the accurate grid frequency and phase during the transient response, which will be detrimental to the transient synchronous stability of grid ...
Yiwen Fan   +4 more
doaj   +1 more source

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