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Transient Stability Enhancement Control Strategy Based on Improved PLL for Grid Connected VSC during Severe Grid Fault

IEEE transactions on energy conversion, 2021
In this article, the transient synchronization process of the grid-connected voltage source converters (VSC) is studied detailly. Firstly, the phase-locked loop (PLL)-synchronized VSC is modeled according to the rotor motion equation of synchronous ...
Yuan Liu   +6 more
semanticscholar   +1 more source

New Perspectives on Stability of Decoupled Double Synchronous Reference Frame PLL

IEEE transactions on power electronics, 2021
Modeling and interpretation of synchronization stability of energy conversion systems with the unbalanced grid is a very practical, complicated, and less explored topic.
P. D. Achlerkar, B. K. Panigrahi
semanticscholar   +1 more source

DSOGI-PLL With In-Loop Filter Based Solar Grid Interfaced System for Alleviating Power Quality Problems

IEEE transactions on industry applications, 2021
This article deals with a dual second-order generalized integrator phase-locked loop (DSOGI-PLL) with in-loop filter-based control approach for a single-stage, three-phase three-wire solar-grid-interfaced system under abnormal grid voltage conditions ...
Abhishek Ranjan, S. Kewat, Bhim Singh
semanticscholar   +1 more source

Improved Design of PLL Controller for LCL-Type Grid-Connected Converter in Weak Grid

IEEE transactions on power electronics, 2020
When LCL-type converter is attached to weak grid, its current control and phase-locked loop (PLL) will interact with each other, via the point of common coupling voltage.
Donghai Zhu   +3 more
semanticscholar   +1 more source

Large Signal Synchronizing Instability of PLL-Based VSC Connected to Weak AC Grid

IEEE Transactions on Power Systems, 2019
Similar large signal synchronizing instability that is common in traditional power system also exists in voltage source converter (VSC) dominated power system, which is increasingly reported and investigated.
Qi Hu, Lijun Fu, Fan Ma, Feng Ji
semanticscholar   +1 more source

24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

IEEE International Solid-State Circuits Conference, 2019
Embedded nonvolatile memory (NVM) and computing-in-memory (CIM) are significantly reducing the latency (tMAC) and energy consumption (EMAC) of multiply- and-accumulate (MAC) operations in artificial intelligence (AI) edge devices [1, 2].
Cheng-Xin Xue   +21 more
semanticscholar   +1 more source

A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

IEEE Journal of Solid-State Circuits, 2019
An analog fractional- $N$ sampling phase-locked loop (PLL) is presented. It achieves 75-fs rms jitter, integrated from 10 kHz to 10 MHz, and a −249.7-dB figure of merit (FoM) at the fractional- $N$ mode with a 52-MHz reference clock.
Wanghua Wu   +10 more
semanticscholar   +1 more source

A 50-mW/ch 2.5-Gb/s/ch data recovery circuit for the SFI-5 interface with digital eye-tracking

IEEE Journal of Solid-State Circuits, 2004
Y. Miki   +6 more
semanticscholar   +1 more source

Integrative oncology: Addressing the global challenges of cancer prevention and treatment

Ca-A Cancer Journal for Clinicians, 2022
Jun J Mao,, Msce   +2 more
exaly  

PLL Synchronization Stability of Grid-Connected Multiconverter Systems

IEEE transactions on industry applications, 2021
Xiuqiang He, H. Geng
semanticscholar   +1 more source

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