A study and experiment plan for digital mobile communication via satellite [PDF]
The viability of mobile communications is examined within the context of a frequency division multiple access, single channel per carrier satellite system emphasizing digital techniques to serve a large population of users.
Craighill, E. J. +4 more
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Novel Systematic Phase Noise Reduction Techniques for Phase Interpolator Clock and Data Recovery [PDF]
, 2013 This work focused on high-speed source-synchronous clock and multi-channel data receivers for inter-chip communications. Designs of inter-chip communication are becoming increasingly difficult with the rise in clock rates and the reduction in voltage ...
Feng, Yu
core +1 more source
Analytical model and behavioral simulation approach for a ΣΔ fractional-N synthesizer employing a sample-hold element [PDF]
, 2003 Bruun, Erik +2 more
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Oversampled analog-to-digital converter architectures based on pulse frequency modulation [PDF]
, 2017 Mención Internacional en el título de doctorThe purpose of this research work is providing new insights in the development of voltage-controlled oscillator based analog-to-digital converters (VCO-based ADCs).
Gutiérrez Fernández, Eric
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An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs
IEEE Journal of Solid-State Circuits, 2014 S. Levantino, Giovanni Marzin, C. Samori
semanticscholar +1 more source
New circuits for time-domain signal processing in low-voltage CMOS [PDF]
, 2018 Aggressive scaling of CMOS technology in sub-100 nm process motivates the replacement of voltage or current-mode signal processing with time-mode approaches which uses digital circuits to perform signal processing.
Ziabakhsh Shalmani, Soheyl
core
Post-silicon Validation of Radiation Hardened Microprocessor and SRAM arrays [PDF]
, 2017 : Digital systems are increasingly pervading in the everyday lives of humans. The security of these systems is a concern due to the sensitive data stored in them.
core
A ΣΔ Closed-Loop Interface for a MEMS Accelerometer with Digital Built-In Self-Test Function. [PDF]
Micromachines (Basel), 2018 Chen D +5 more
europepmc +1 more source
NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing [PDF]
This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex ...
Berg, Melanie +3 more
core +1 more source
Analysis and design of ΣΔ Modulators for Radio Frequency Switchmode Power Amplifiers [PDF]
, 2013 Power amplifiers are an integral part of every basestation, macrocell, microcell and mobile phone, enabling data to be sent over the distances needed to reach the receiver’s antenna.
Podsiadlik, Tomasz
core