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Power Consumption Management on FPGAs

15th International Conference on Electronics, Communications and Computers (CONIELECOMP'05), 2005
During the last years, the number of hardware implementations based on field programmable gate arrays (FPGA) is increasing because it satisfies the high speed of system and hardware cost constraints. FPGA implementation allows the building of rapid prototypes reducing development times and board area.
Andrés David García García   +2 more
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ARM7TDMI power consumption

IEEE Micro, 1997
Portable and handheld products require processors that consume less power than those in desktop and other powered applications. As a result, designers must analyze power use in the early stage of design both at the circuit and system levels. RISC processors, such as our ARM7TDMI, have both strengths and weaknesses as far as power consumption is ...
openaire   +1 more source

Power consumption in modelling and simulation

Journal of Simulation, 2019
Recognised as an important concern in mobile, cloud, and high performance computing, the power and energy consumed by computing applications is growing in importance across an increasingly broad ra...
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GATE RESIZING TO REDUCE POWER CONSUMPTION

International Journal of Foundations of Computer Science, 2002
We study the problem of resizing gates so as to reduce overall power consumption while satisfying a circuit's timing constraints. Polynomial time algorithms for series-parallel and tree circuits are obtained. Gate resizing with multigate modules is shown to be NP-hard.
Edward Y. C. Cheng, Sartaj Sahni
openaire   +1 more source

Evaluation of power consumption in adiabatic circuits

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353), 2002
In this paper a simple and accurate model to evaluate the energy consumption of the digital adiabatic circuits is proposed. It is based on a linearization of the circuit, which leads to an RC mesh equivalent circuit. The obtained expression of the energy consumption of a generic adiabatic gate is very simple, thus it can be used for pencil-and-paper ...
M. ALIOTO, PALUMBO, Gaetano
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Optimizing cooling and server power consumption

2011 IEEE 7th International Conference on Intelligent Computer Communication and Processing, 2011
This paper proposes new solution strategies for a challenging optimization problem, called Cooling-aware Workload Placement Problem, that looks for a workload placement that optimizes the overall data center power consumption given by the sum of the server power consumption and of the computer room air conditioner power consumption.
Paolo Cremonesi   +2 more
openaire   +1 more source

Power Consumption of Fault Tolerant Busses

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008
On-chip interconnects in very deep submicrometer technology are becoming more sensitive and prone to errors caused by power supply noise, crosstalk, delay variations and transient faults. Error-correcting codes (ECCs) can be employed in order to provide signal transmission with the necessary data integrity.
ROSSI, DANIELE   +4 more
openaire   +4 more sources

Power Consumption in Handheld Computers

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems, 2006
While the computing requirements of mobile battery-powered systems in general are increasing, it is clear that advances in battery technology have not kept pace with the ever increasing energy demands of these devices. Researchers are exploring architectural, hardware, software and system level optimization techniques to minimize the overall energy ...
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Comparison of LoRaWAN classes and their power consumption

2017 IEEE Symposium on Communications and Vehicular Technology (SCVT), 2017
Many Internet of Things (IoT) applications benefit greatly from low-power long-range connectivity. A promising technology to achieve the low-power and long-range requirements is seen in LoRaWAN, a media access control (MAC) protocol maintained by the LoRa Alliance and leveraging Semtech's patented LoRa radio modulation technology.
Phui San Cheong   +3 more
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Power Consumption Modeling for DVFS Exploitation

2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, 2010
A lot of task scheduling algorithms and power management policies have been developed based on simplistic power models, which rarely take into account the effects of the power consumptions of the different components of a real system. Most of the models on which the study of the DVFS scheduling is based, make the assumption that the power consumption ...
Andrea Castagnetti   +3 more
openaire   +3 more sources

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