Results 11 to 20 of about 18,777,208 (356)
Results in Physics, 2023 More physical qubits and qubit connections integrated on a superconducting quantum processor can improve the ability to execute quantum programs, but on the other hand, they might increase the probability of frequency collisions.
Tian Yang +5 more
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A quantum processor based on coherent transport of entangled atom arrays [PDF]
Nature, 2021 The ability to engineer parallel, programmable operations between desired qubits within a quantum processor is key for building scalable quantum information systems1,2.
D. Bluvstein +11 more
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Towards Efficient Superconducting Quantum Processor Architecture Design [PDF]
International Conference on Architectural Support for Programming Languages and Operating Systems, 2019 More computational resources (i.e., more physical qubits and qubit connections) on a superconducting quantum processor not only improve the performance but also result in more complex chip architecture with lower yield rate.
Gushu Li, Yufei Ding, Yuan Xie
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IEEE Access, 2022 This paper presents a high-performance and energy efficient processor exploiting a Magnetoresistive-based Computing-in-Memory array architecture (so-called MagCiM processor), to perform Boolean logic functions on operands stored in a memory array.
Vahid Jamshidi +2 more
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Energy Efficient Multi-Core Processing [PDF]
Electronics, 2014 This paper evaluates the present state of the art of energy-efficient embedded processor design techniques and demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve ...
Charles Leech, Tom J. Kazmierski
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Novel graph processor architecture, prototype system, and results [PDF]
IEEE Conference on High Performance Extreme Computing, 2016 Graph algorithms are increasingly used in applications that exploit large databases. However, conventional processor architectures are inadequate for handling the throughput and memory requirements of graph computation.
William S. Song +3 more
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Hardware/software co-verification of USB3.0 IP core under PowerPC architecture
Dianzi Jishu Yingyong, 2022 With the increasing requirement of transmission rate of USB,the traditional PowerPC processor based on the USB2.0 can not meeet the requirements of high speed and large-capacity transmission.The paper presents a solution of USB 3.0 base on PowerPC ...
Deng Jiawei +4 more
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Project design for computer architecture practical sessions based on field-programmable gate array
Mokslas: Lietuvos Ateitis, 2021 Field-programmable logic arrays are often used in courses on computer architecture. The student must describe the processor with the external components necessary for its operation in the specified HDL (hardware description language) language according ...
Kęstutis Bartnykas
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Parallel Architecture Design for OpenVX Kernel Image Processing Functions [PDF]
Jisuanji kexue yu tansuo, 2022 Although the traditional programmable processors are highly flexible, their processing speed and perfor-mance are inferior to the application specific integrated circuit (ASIC).
PAN Fengrui, LI Tao, XING Lidong, ZHANG Haocong, WU Guanzhong
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Ultra-Low-Energy DSP Processor Design for Many-Core Parallel Applications [PDF]
Journal of Electrical and Computer Engineering Innovations, 2020 Background and Objectives: Digital signal processors are widely used in energy constrained applications in which battery lifetime is a critical concern. Accordingly, designing ultra-low-energy processors is a major concern.
B. Soltani Farani +3 more
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