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Towards Nanoelectronics Processor Architectures
Journal of Electronic Testing, 2007In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliable nanoelectronic devices, fault tolerance schemes are required so as to ensure the basic correctness of any computation.
Wenjing Rao +2 more
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2005
An architecture for a pipeline processor circuit, preferably of the VLIW type, comprises a plurality of stages and a network of forwarding paths which connect pairs of said stages, as well as a register file for operand write-back. An optimization-of-power-consumption function is provided via inhibition of writing and subsequent readings in said ...
SAMI, MARIAGIOVANNA +5 more
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An architecture for a pipeline processor circuit, preferably of the VLIW type, comprises a plurality of stages and a network of forwarding paths which connect pairs of said stages, as well as a register file for operand write-back. An optimization-of-power-consumption function is provided via inhibition of writing and subsequent readings in said ...
SAMI, MARIAGIOVANNA +5 more
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Manycore processor architectures
2019Trade-offs between performance and power have dominated the processor architecture landscape in recent times and are expected to exert a considerable influence in the future. Processing technologies ceased to provide automatic speedups across generations, leading to the reliance on architectural innovation for achieving better performance.
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Computer, 1982
Novel VLSI processor architectures, some implemented by only a few different types of simple cells, are leading the way towards a new generation of computers. A brief survey of these novel VLSI processor architectures illustrates the exciting work going on in the area, most of which is still at the research stage. 45 references.
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Novel VLSI processor architectures, some implemented by only a few different types of simple cells, are leading the way towards a new generation of computers. A brief survey of these novel VLSI processor architectures illustrates the exciting work going on in the area, most of which is still at the research stage. 45 references.
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Processor power subsystem architectures
APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058), 2002This trade study compares the cost, weight, volume and reliability of a power subsystem for an avionic processor. It considers a range of options from a centralized power subsystem to a distributed subsystem with an intermediate bus. The centralized approach was found unsuitable for the lower voltage logic devices that will come to the market over the ...
R. Kollman, D. Chamberlin
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Modern central processor architecture
Proceedings of the IEEE, 1975A number of significant architectural concepts which have evolved in recent years are reviewed. These concepts are: the notion of process and the facilities for process management, such as dispatching and synchronization; the use of segmentation in organizing address spaces, and the resulting sharing and protection capabilities; the control of access ...
T.D. Atkinson +3 more
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Power-efficient Processor Architecture
2010Since the creation of the first processor/CPU in 1971, silicon technology consistently allowed to pack twice the number of transistors on the same die every 18 to 24 months [33]. Scaling of technology allowed the implementation of faster and larger circuits on silicon, permitting a sophisticated and powerful set of features to be integrated into CPU ...
Preeti Ranjan Panda +3 more
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The Cell Processor Architecture
38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05), 2006This talk will present the Cell processor, jointly developed by the STI (Sony-Toshiba-IBM) partnership. Cell is a non-homogeneous chip multiprocessor intended for general-purpose applications but with a particular emphasis on multimedia performance. The Cell processor combines a 64bit Power Architecture(TM) core with 8 Synergistic Processors.
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Reconfigurable transputer processor architectures
[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track, 2003The author describes concurrent-processing computers capable of performance in the gigaflop (billions of floating-point operators) range on real scientific and engineering applications, which have ben developed as part of Esprit project 805. The architecture is readily scalable up to over a thousand processors and provides genuinely cost-effective ...
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Hardened Processor Architecture
2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES), 2023Ján Mach +2 more
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