Results 11 to 20 of about 250 (178)
Hierarchical and High-Girth QC LDPC Codes [PDF]
Submitted to IEEE Transactions on Information ...
Yige Wang +2 more
openaire +2 more sources
4-CYCLE FREE APM LDPC CODES WITH AN EXPLICIT CONSTRUCTION [PDF]
Recently, a class of low-density parity-check codes based on affine permutation matrices, called APM-LDPC codes, have been considered which have some advantages than quasi-cyclic (QC) LDPC codes in terms of minimum-distance, cycle distribution, and error-
Z. Gholami, M. Gholami
doaj +1 more source
Area‐ and energy‐efficient high‐throughput QC‐LDPC encoder for space applications
An area‐ and energy‐efficient encoding method and encoder architecture are proposed using a bit selector before bit XOR operations in vector–matrix multiplication. A fully parallel low‐density parity check encoder is implemented on the aiwan Semiconductor Manufacturing Company (TSMC) 90 nm complementary metal oxide semiconductor (CMOS) technology ...
Lintao Li, Jiayi Lv, Yimin Li
wiley +1 more source
With the rapid development of 5G communication and wireless Internet of Things technology, the application of intelligent wearable devices based on wireless data transmission technology is becoming more and more popular. However, due to the bandwidth of wireless data transmission nodes and the power consumption of the device system, the use time and ...
Yaguang Yang +4 more
wiley +1 more source
ON THE CLASS OF ARRAY-BASED APM-LDPC CODES [PDF]
We construct an explicit class of affine permutation matrix low-density parity-check (APM-LDPC) codes based on the array parity-check matrix by using two affine maps f (x) = x-1 and g(x) = 2x-1 on Z_m, where m is an odd prime number, with girth 6 and ...
A. Nassaj, A. R. Naghipour
doaj +1 more source
Embedded Parallel Implementation of LDPC Decoder for Ultra‐Reliable Low‐Latency Communications
Ultra‐reliable low‐latency communications, URLLC, are designed for applications such as self‐driving cars and telesurgery requiring a response in milliseconds and are very sensitive to transmission errors. To match the computational complexity of LDPC decoding algorithms to URLLC applications on IoT devices having very limited computational resources ...
Mhammed Benhayoun +4 more
wiley +1 more source
Performance analysis of LDPC coded GFDM systems
Abstract This paper analyzes the error probability performance of low‐density parity‐check (LDPC) coded generalized frequency division multiplexing (GFDM) systems over Rayleigh fading and additive white Gaussian noise (AWGN) channels. The initial log‐likelihood ratio (LLR) expressions used in the sum‐product algorithm (SPA) decoder are first derived ...
Yanpeng Wang, Paul Fortier
wiley +1 more source
Distributed QC-LDPC Coded Spatial Modulation for Half-Duplex Wireless Communications [PDF]
The bit error rate (BER) performance of spatial modulation (SM) can be further improved by applying quasi-cyclic low-density parity-check (QC-LDPC) codes recommended in 5G to SM.
C. L. Zhao +4 more
doaj
DNN‐aided read‐voltage threshold optimization for MLC flash memory with finite block length
Abstract The error‐correcting performance of multi‐level‐cell (MLC) NAND flash memory is closely related to the block length of error‐correcting codes (ECCs) and log‐likelihood‐ratios of the read‐voltage thresholds. Driven by this issue, this paper optimizes the read‐voltage thresholds for MLC flash memory to improve the decoding performance of ECCs ...
Cheng Wang +6 more
wiley +1 more source
This paper proposed a novel method for constructing quasi-cyclic low-density parity-check (QC-LDPC) codes of medium to high code rates that can be applied in cloud data storage systems, requiring better error correction capabilities.
Vairaperumal Bhuvaneshwari +1 more
doaj +1 more source

