Results 41 to 50 of about 20,749 (259)
Embedded Parallel Implementation of LDPC Decoder for Ultra‐Reliable Low‐Latency Communications
Applied Computational Intelligence and Soft Computing, Volume 2023, Issue 1, 2023., 2023 Ultra‐reliable low‐latency communications, URLLC, are designed for applications such as self‐driving cars and telesurgery requiring a response in milliseconds and are very sensitive to transmission errors. To match the computational complexity of LDPC decoding algorithms to URLLC applications on IoT devices having very limited computational resources ...
Mhammed Benhayoun +4 more
wiley +1 more source
High Efficiency Continuous-Variable Quantum Key Distribution Based on ATSC 3.0 LDPC Codes. [PDF]
Entropy (Basel), 2020 Due to the rapid development of quantum computing technology, encryption systems based on computational complexity are facing serious threats. Based on the fundamental theorem of quantum mechanics, continuous-variable quantum key distribution (CVQKD) has
Zhang K, Jiang XQ, Feng Y, Qiu R, Bai E.
europepmc +2 more sources
Error Floor Analysis of Quasi-Cyclic LDPC and Spatially Coupled-LDPC Codes and Construction of Codes with Low Error Floor [PDF]
, 2021 Forward error-correcting (FEC) codes play an important role in transmitting data with extremely high reliability through modern communication systems. In this thesis, we study the design and analysis of low-density parity-check (LDPC) codes in general ...
Naseri, Sima
core +2 more sources
Performance analysis of LDPC coded GFDM systems
IET Communications, Volume 16, Issue 14, Page 1663-1673, August 2022., 2022 Abstract This paper analyzes the error probability performance of low‐density parity‐check (LDPC) coded generalized frequency division multiplexing (GFDM) systems over Rayleigh fading and additive white Gaussian noise (AWGN) channels. The initial log‐likelihood ratio (LLR) expressions used in the sum‐product algorithm (SPA) decoder are first derived ...
Yanpeng Wang, Paul Fortier
wiley +1 more source
DNN‐aided read‐voltage threshold optimization for MLC flash memory with finite block length
IET Communications, Volume 16, Issue 2, Page 120-130, January 2022., 2022 Abstract The error‐correcting performance of multi‐level‐cell (MLC) NAND flash memory is closely related to the block length of error‐correcting codes (ECCs) and log‐likelihood‐ratios of the read‐voltage thresholds. Driven by this issue, this paper optimizes the read‐voltage thresholds for MLC flash memory to improve the decoding performance of ECCs ...
Cheng Wang +6 more
wiley +1 more source
Distributed QC-LDPC Coded Spatial Modulation for Half-Duplex Wireless Communications [PDF]
Radioengineering, 2022 The bit error rate (BER) performance of spatial modulation (SM) can be further improved by applying quasi-cyclic low-density parity-check (QC-LDPC) codes recommended in 5G to SM.
C. L. Zhao +4 more
doaj
A Viterbi Decoder under Class A Modeled Noise in Shallow Water
Wireless Communications and Mobile Computing, Volume 2022, Issue 1, 2022., 2022 A traditional Viterbi decoder is primarily optimized for additive white Gaussian noise (AWGN). With the AWGN channel, it offers good decoding performance. However, the underwater acoustic communication (UAC) channel is extremely complicated. In addition to white noise, there are a variety of artificial and natural impulse noise that occur suddenly. The
Yifei Wang +11 more
wiley +1 more source
Design of Nonbinary LDPC Cycle Codes with Large Girth from Circulants and Finite Fields
Wireless Communications and Mobile Computing, Volume 2021, Issue 1, 2021., 2021 In this paper, we study a class of nonbinary LDPC (NBLDPC) codes whose parity‐check matrices have column weight 2, called NBLDPC cycle codes. We propose a design framework of (2, ρ)‐regular binary quasi‐cyclic (QC) LDPC codes and then construct NBLDPC cycle codes of large girth based on circulants and finite fields by randomly choosing the nonzero ...
Hengzhou Xu +6 more
wiley +1 more source
ETRI Journal, 2023 This paper proposed a novel method for constructing quasi-cyclic low-density parity-check (QC-LDPC) codes of medium to high code rates that can be applied in cloud data storage systems, requiring better error correction capabilities.
Vairaperumal Bhuvaneshwari +1 more
doaj +1 more source
Construction of QC-LDPC Codes with Low Error Floor by Efficient Systematic Search and Elimination of Trapping Sets [PDF]
, 2021 In this thesis, we propose a systematic design of binary protograph-based quasi-cyclic (QC) low-density parity-check (LDPC) codes with low error floor. We fifirst characterize the trapping sets of such codes and demonstrate that the QC structure of the ...
Karimi, Bashirreza
core +2 more sources