Results 71 to 80 of about 595,487 (209)
Floor Scale Modulo Lifting for QC-LDPC codes
7 pages, 2 ...
Nikita Polyanskii +2 more
openaire +2 more sources
Design of low-density parity-check codes: An overview
This article provides an overview of the conflicting design tradeoffs of low-density parity-check (LDPC) codes and thus advocates a more holistic approach to their design for wireless channels.
Chen, Sheng +2 more
core +1 more source
Low latency low power bit flipping algorithms for LDPC decoding [PDF]
Low Density Parity Check (LDPC) codes have been adopted in a number of wired and wireless communication standards due to their improved error correcting ability and relatively simple decoder structure.
Koçak, T +11 more
core +1 more source
Novel construction of QC-LDPC codes with modified 2-D GRS codes
The construction method for QC-LDPC (quasi-cyclic low density parity-check) code with modified two-dimensional generalized reed-solomon (2-D GRS) code is proposed using the generator polynomial of GRS code,so thus the constructed code can have better ...
Ming ZHAO, Xiao-lin ZHANG
doaj +2 more sources
An LDPC Decoder Architecture forWireless Sensor Network Applications [PDF]
The pervasive use of wireless sensors in a growing spectrum of human activities reinforces the need for devices with low energy dissipation. In this work, coded communication between a couple of wireless sensor devices is considered as a method to reduce
Biroli, Andrea Dario Giancarlo +5 more
core +1 more source
Type-II QC-LDPC Codes From Multiplicative Subgroup of Prime Field
A quasi-cyclic (QC) low-density parity-check (LDPC) code is called type-II, if the maximum weight over all circulants appearing in the parity-check matrix has the value of two. On the basis of multiplicative subgroup analysis for the prime field, a novel
Guohua Zhang +4 more
doaj +1 more source
Low-density parity-check codes and their rateless relatives
This survey guides the reader through the extensive open literature that is covering the family of low-density parity-check LDPC codes and their rateless relatives.
Chen, Sheng +2 more
core +2 more sources
Low Power QC-LDPC Decoder Based on Token Ring Architecture
The article presents an implementation of a low power Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) decoder in a Field Programmable Gate Array (FPGA) device. The proposed solution is oriented to a reduction in dynamic energy consumption.
Mateusz Kuc +2 more
doaj +1 more source
Construction Method of QC-LDPC Codes with Big Girth for Fast Encoding [PDF]
The sub-matrices on both diagonals of the right half of the check matrix are unit matrices.Existence of the deterministic unit matrix not only destroys the randomness of Quasie Cyclic-Low Density Parity Check(QC-LDPC) code,it leads to a certain loss of ...
PENG Haiying,YANG Jian,SUN Lijun
doaj
Investigation of punctured LDPC codes and time-diversity on free-space optical links [PDF]
In this paper, we analyze the behavior of DVB-S2 un-punctured/punctured low-density parity-check (LDPC) coded on-off-keying (OOK) under atmospheric turbulence conditions by utilizing time diversity. A performance characterization between these schemes is
Ghassemlooy, Zabih +4 more
core

