Results 271 to 280 of about 22,912 (307)

RISC-V Is Inevitable

2023 International Conference on IC Design and Technology (ICICDT), 2023
Sam Rogan, Yoshihito Kondo
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Investigation of RISC-V

Programming and Computer Software, 2021
V. A. Frolov, V. A. Galaktionov, V. V. Sanzharov   +2 more
openaire   +1 more source

The Scale4Edge RISC-V Ecosystem

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022
Ecker, Wolfgang, Adelt, Peer, Müller, Wolfgang, Heckmann, Reinhold, Kristic, Milos, Herdt, Vladimir, Drechsler, Rolf, Angst, Gerhard, Wimmer, Ralf, Mauderer, Andreas, Stahl, Rafael, Emrich, Karsten, Müller-Gritschneder, Daniel, Becker, Bernd, Scholl, Philipp, Jentzsch, Eyck, Schlamelcher, Jan, Grüttner, Kim, Palomero Bernardo, Paul, Bringmann, Oliver, Damian, Mihaela, Oppermann, Julian, Koch, Andreas, Bormann, Jörg, Partzsch, Johannes, Mayr, Christian, Kunz, Wolfgang   +26 more
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Podpora RISC-V v MSIMu

2023
In this thesis we have added support for RISC-V into the MSIM emulator. MSIM supported only the MIPS R4000 as a CPU, and has been used for teaching the Operating systems course. This project redesigns MSIM to support multiple CPU architectures and adds an implementation of a RISC-V CPU. RISC-V as an architecture provides a basic instruction set as well
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Automotive RISC-V Collaboration

New Electronics, 2021
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A High-Performance Domain-Specific Processor With Matrix Extension of RISC-V for Module-LWE Applications

IEEE Transactions on Circuits and Systems I: Regular Papers, 2022
Yifan Zhao, Ruiqi Xie, Guozhu Xin
exaly  

Confidential Computing on RISC-V

Getting confidential computing right is a tough challenge. Other architectures already tried in the past to introduce mechanisms for providing confidentiality guarantees, and in many cases failed. On RISC-V the Confidential Computing SIG, under the Security HC, is working on two specifications for providing confidentiality guarantees for VMs/TEEs and ...
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Emoji shellcoding in RISC-V

2023 IEEE Security and Privacy Workshops (SPW), 2023
Hadrien Barral, Georges-Axel Jaloyan, David Naccache   +2 more
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RISC-V SOC Verification

New Electronics, 2021
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CORDIC Accelerator for RISC-V

2021 29th Telecommunications Forum (TELFOR), 2021
Recep Onur Yildiz, Ayse Yilmazer-Metin
openaire   +1 more source