Results 251 to 260 of about 549,692 (299)

Advanced mask rule check (MRC) tool

SPIE Proceedings, 2006
As patterns on photomasks are getting more complex due to RET technologies, mask rule check (MRC) has become an essential process before manufacturing photomasks. Design rule check (DRC) tools in the EDA field can be applied for MRC. However, photomask data has unique characteristics different from IC design, which causes many problems when handling ...
Kokoro Kato, Kuninori Nishizawa, Tadao Inoue, Koki Kuriyama, Toshio Suzuki, Shogo Narukawa, Naoya Hayashi   +6 more
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Consistency Checking of Compliance Rules

2010
Compliance checking of business process models against regulation is inevitable. Due to various sources of compliance requirements, a conflict of interest of such requirements is very likely. Thus, it is crucial to analyze the relation between compliance rules to discover any possible conflicts before even checking such rules against process models ...
Ahmed Awad, Matthias Weidlich, Mathias Weske   +2 more
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Model Checking with Graphical Validation Rules

15th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems (ecbs 2008), 2008
The assurance of quality and reliability of process models and workflows is essential for model driven software development. There are numerous ways to achieve these objectives. One is model checking, through which it can be verified that a model satisfies specific logical rules. The model to be checked is usually given as a finite state machine. Rules
Sven Feja, Daniel Fötsch
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Evidence-based approach to setting delta check rules

Critical Reviews in Clinical Laboratory Sciences, 2020
Delta checks are a post-analytical verification tool that compare the difference in sequential laboratory results belonging to the same patient against a predefined limit. This unique quality tool highlights a potential error at the individual patient level.
Corey, Markus, Rui Zhen, Tan, Tze Ping, Loh   +2 more
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Model Checking a Rule-based Parser

2007 International Conference on Natural Language Processing and Knowledge Engineering, 2007
In the field of natural language processing, one key difficulty for rule-based systems is the debugging and tuning of rules. In this paper we suggest a novel method that use model checking tools to theoretically verify the rule system of a feature-based parser.
Hui Liu, Jinglei Zhao, Ruzhan Lu
openaire   +1 more source

Data Check: California rules U.S. corporate research

Science, 2016
New NSF survey finds that California has widened its lead over the rest of the country in state-by-state analysis of what companies spend on research.
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Full chip ESD design rule checking

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), 2002
Electrostatic discharge (ESD) protection is essential for reliability and high yield. ESD design rule checking, however, is beyond the scope of commercial DRC tools. We have presented previously an ESD design rule checker for individual I/O cells. Full chip ESD design rules come in a myriad number of ways and are heavily process dependent.
Q. Li, Y.J. Huh, J.W. Chen, P. Bendix, S.M. Kang   +4 more
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Equivalence checking: a rule-based approach

Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings., 2006
A well-known problem in the design of embedded systems is checking for equivalence of two systems, and the traditional approach constructs and proves equivalence of finite state models of the two systems. Although widely and successfully used, the main problem is state space explosion, and other forms of higher-level analysis are also needed typically.
M. Fujita, S. Shankar, S. Shunsuke
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Security Rule Checking in IC Design

Computer, 2016
The Design Security Rule Check (DSeRC) framework is a first step toward automating the analysis of integrated circuit design vulnerabilities. By mathematically modeling vulnerabilities at each abstraction level and associating them with metrics and rules, DSeRC aims to help designers quantitatively assess potential problems early on, improving security
Kan Xiao, Adib Nahiyan, Mark Tehranipoor
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Rule checking at the register level

IEEE Spectrum, 1996
For huge, complex circuits, checking design rules at a level of abstraction above the gate level can identify architectural problems early on. Today's more mature equivalence checkers require little user input, but are not able to verify the quality or correctness of an original design.
D. Caporossi, F.E. Marschner, S. Read
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