Results 291 to 300 of about 2,767,476 (321)
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VLSI systems for design rule checks
1984We develop VLSI designs for the solution of several problems that arise in the design rule check phase of design automation.
Rajiv Kane, Sartaj Sahni
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The Octant Rule: Check UPFRont!
Journal of Chemical Education, 2012The importance of considering substituents in the front half of the space is demonstrated when applying the octant rule.
Ian J. McNaught, Gavin D. Peckham
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Checking DFT Rules with a VHDL Simulator
1993Abstract We describe the application of VHDL simulators to check the conformance of a design with Design for Testability (DFT) rules. The basic idea is to define a special DFT logic using VHDL's powerful logic modeling capabilities and to perform a kind of symbolic simulation based on this DFT logic.
Wolfgang Glunz, Torsten Rössel
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A practical online design rule checking system
Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90, 1990In this paper, we propose a practical online design rule checking system, which can provide the following features: an ability to cope with a complicated and wide variety of design rules with high accuracy, easy use, high speed incremental DRC (simultaneous checking with pattern editing) and total DRC (non-simultaneous checking), high speed pattern ...
Goro Suzuki, Yoshio Okamura
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Rule checking at the register level
IEEE Spectrum, 1996For huge, complex circuits, checking design rules at a level of abstraction above the gate level can identify architectural problems early on. Today's more mature equivalence checkers require little user input, but are not able to verify the quality or correctness of an original design.
D. Caporossi, F.E. Marschner, S. Read
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Full chip ESD design rule checking
ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), 2002Electrostatic discharge (ESD) protection is essential for reliability and high yield. ESD design rule checking, however, is beyond the scope of commercial DRC tools. We have presented previously an ESD design rule checker for individual I/O cells. Full chip ESD design rules come in a myriad number of ways and are heavily process dependent.
Q. Li +4 more
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Consistency and interoperability checking for component interaction rules
12th Asia-Pacific Software Engineering Conference (APSEC'05), 2005In component-based software development, it is important to ensure interoperability between components based on their unambiguous semantic descriptions, in order to obtain a viable system. A body of recent work has explored the use of formal languages in specifying component interaction protocols for interoperability checking, but lacks the ...
Jin, Yan, Han, Jun
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A Slide Rule Device for Checking 2-Summability
IEEE Transactions on Computers, 1968Abstract—A switching function which is 2-summable is not linearly separable (a threshold function). A test for 2-summability is given which uses the decimal numbers corresponding to the standard products (minterms) of a function, a slide rule like device, and a preformed chart. The device may be used with functions of up to six variables.
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The Slide Rule as a Check in Trignometry
The Mathematics Teacher, 1930For some years the use of the slide rule as a check in trigonometry has been allowed in the Regents' Examinations of New York State provided that all the computation work appears on the answer paper. The State Education Department insists that the students of trigonometry be trained in the use of tables of natural and logarithmic functions.
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Visualization of Checking Results for Graphical Validation Rules
2015Graphically represented Business Process Models (BPMs) are common artifacts in documentation as well as in early phases of (software) development processes. The Graphical Computation Tree Logic (G-CTL) is a notation to define formal graphical validation rules on the same level of abstraction as the BPMs, allowing to specify high-level requirements ...
Sören Witt +4 more
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