Quasi-Delay-Insensitive Circuits are Turing-Complete [PDF]
, 1995 Quasi-delay-insensitive (QDI) circuits are those whose correct operation does not depend on the delays of operators or wires, except for certain wires that form isochronic forks.
Manohar, Rajit, Martin, Alain J.
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, 2017 The readout electronics upgrade for the ATLAS Liquid Argon Calorimeters at the CERN Large Hadron Collider requires a radiation-hard ADC. The design of a radiation-hard dual-channel 12-bit 40 MS/s pipeline ADC for this use is presented.
Andeen, Timothy +7 more
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Microcontroller Power Consumption Measurement Based on PSoC
Telfor Journal, 2016 Microcontrollers are often used as central processing elements in embedded systems. Because of different sleep and performance modes that microcontrollers support, their power consumption may have a high dynamic range, over 100 dB.
S. P. Janković, V. R. Drndarević
doaj +1 more source
Synthetic duocarmycins: structural evolution from SAR to prodrugs and ADCs - a searchable structure/function database [PDF]
, 2022 Jan G. Felber, Oliver Thorn‐Seshold
openalex +1 more source
Behavioral Modeling of SAR ADCs in Simulink
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018 This paper presents a toolbox for the behavioral simulation of SAR ADCs in Simulink®. The models include the most limiting circuit effects such as sampled thermal noise, capacitor mismatch, finite settling, comparator noise and offset. A user friendly interface is also included to allow study and high-level design of SAR ADCs, which is illustrated by ...
Molina Salgado, Gerardo +4 more
openaire +2 more sources
Empirical Analysis of Chirp and Multitones Performances with a UWB Software Defined Radar: Range, Distance and Doppler [PDF]
, 2014 In this study, a protocol for an unbiased analysis of radar signals' performance. Using a novel UWB software-defined radar, range profile, Doppler profile and detection range are evaluated for both Linear Frequency Modulated pulse and Multitones.
Gray, Derek +2 more
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A neural network based background calibration for pipelined‐SAR ADCs at low hardware cost
Electronics Letters, 2023 This paper proposes a background calibration scheme for the pipelined‐Successive Approximation Register (SAR) Analog‐to‐Digital Converter (ADC) based on the neural network.
Yuguo Xiang +5 more
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Hybrid MIMO Architectures for Millimeter Wave Communications: Phase Shifters or Switches?
, 2015 Hybrid analog/digital MIMO architectures were recently proposed as an alternative for fully-digitalprecoding in millimeter wave (mmWave) wireless communication systems.
Alkhateeb, Ahmed +4 more
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Porting Spotlight Range Migration Algorithm Processor from Matlab to Virtex 6 [PDF]
, 2015 This paper describes the implementation and optimization of a Synthetic Aperture Radar process Spotlight Range Migration Algorithm processor on FPGA Virtex 6 DSP kit that fits on the chip.
Gray, D., Le Kernec, J., Melnikov, A.
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A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications [PDF]
, 2012 A power-scalable SAR ADC for sensor applications is presented. The ADC features a reconfigurable 5-to-10-bit DAC whose power scales exponentially with resolution.
Chandrakasan, Anantha P., Yip, Marcus
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