Results 61 to 70 of about 18,274,004 (195)
АНАЛИЗ РЕАЛИЗАЦИЙ АЛГОРИТМА КРИПТОГРАФИЧЕСКОГО ХЭШИРОВАНИЯ SHA-1 НА КОНВЕЙЕРНЫХ СХЕМАХ [PDF]
, 2019 An analysis of hardware implementations of the cryptographic hash function SHA-1 based on pipeline circuits with different numbers of logic levels was made in this paper.
Е. В. Листопад, E. V. Listopad
core
Lightweight Implementations of the SHA-3 Finalist Keccak on FPGAs [PDF]
, 2012 The Secure Hash Algorithm (SHA) is a cryptographic hash function published by the National Institute of Standard and Technology (NIST) as a U.S Federal Information and Processing Standard (FIPS).
Gurung, Smriti
core +1 more source
An SHA-3 Hardware Architecture against Failures Based on Hamming Codes and Triple Modular Redundancy. [PDF]
Sensors (Basel), 2022 Torres-Alvarado A +5 more
europepmc +1 more source
Analysis of SHA-1 with Reducing Width for Modular Differential Attack
四川大学学报. 自然科学版, 2016 Modular differential attack is one of the important methods in SHA-1 collision attacks. In allusion to width-reduced SHA-1 algorithm, the width-reduced local collisions theorems are deduced in this paper, and the probability of local collisions in width ...
HU Yun-Shan +3 more
doaj
Security Reductions of the Second Round SHA-3 Candidates [PDF]
, 2011 In 2007, the US National Institute for Standards and Technology announced a call for the design of a new cryptographic hash algorithm in response to vulnerabilities identified in existing hash functions, such as MD5 and SHA-1. NIST received many submissions, 51 of which got accepted to the first round.
Elena Andreeva 0001 +2 more
openaire +2 more sources
Asymptotic Analysis of Plausible Tree Hash Modes for SHA-3
IACR Transactions on Symmetric Cryptology, 2017 Discussions about the choice of a tree hash mode of operation for a standardization have recently been undertaken. It appears that a single tree mode cannot address adequately all possible uses and specifications of a system. In this paper, we review the
Kevin Atighehchi, Alexis Bonnecaze
doaj +1 more source
Developing a Hardware Evaluation Method for SHA-3 Candidates [PDF]
, 2010 The U.S. National Institute of Standards and Technology encouraged the publication of works that investigate and evaluate the performances of the second round SHA-3 candidates. Besides the hardware characterization of the 14 candidate algorithms, the main goal of this paper is the description of a reliable methodology to efficiently characterize and ...
Luca Henzen +5 more
openaire +1 more source
SHA-3 on ARM11 processors [PDF]
, 2011 This paper presents high-speed assembly implementations of the 256-bit-output versions of all five SHA-3 finalists and of SHA-256 for the ARM11 family of processors. We report new speed records for all of the six implemented functions.
Shang-Yi Yang +2 more
core
Compact FPGA Implementations of the Five SHA-3 Finalists
, 2011 Allowing good performances on different platforms is an important criteria for the selection of the future sha-3 standard. In this paper, we consider the compact implementations of blake, Grøstl, jh, Keccak and Skein on recent fpga devices.
Guerric Meurice de Dormale +13 more
core +1 more source
Orthopedic Research and Reviews, 2019 Noratep Kulachote,1 Paphon Sa-Ngasoongsong,1 Siwadol Wongsak,1 Kulapat Chulsomlee,2 Chavarat Jarungvittayakon,1 Praman Fuangfa,3 Viroj Kawinwonggowit,1 Pornchai Mulpruek1 1Department of Orthopedics, Faculty of Medicine Ramathibodi Hospital, Mahidol ...
Kulachote N +7 more
doaj