Further study of inversion layer MOS solar cells [PDF]
A group of inversion layer MOS solar cells has been fabricated. The highest value of open-circuit voltage obtained for the cells is 0.568V. One of the cells has produced a short-circuit current of 79.6 mA and an open-circuit voltage of 0.54V.
Ho, Fat Duen
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A theoretical analysis of the current-voltage characteristics of solar cells [PDF]
The following topics are discussed: (1) dark current-voltage characteristics of solar cells; (2) high efficiency silicon solar cells; (3) short circuit current density as a function of temperature and the radiation intensity; (4) Keldysh-Franz effects ...
Fang, R. C. Y., Hauser, J. R.
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Light Trapping Induced High Short-Circuit Current Density in III-Nitride Nanorods/Si (111) Heterojunction Solar Cells. [PDF]
Nanoscale Res Lett, 2020 Chang CW +6 more
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The use of FEP Teflon in solar cell cover technology [PDF]
FEP plastic film was used as a cover and as an adhesive to bond cover glasses to silicon solar cells. Various anti-reflective coatings were applied to cells and subsequently covered with FEP.
Broder, J. D., Mazaris, G. A.
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Nauka ta progres transportu, 2014 Purpose. Influence investigation of contact system parameters on current rate of rise during short circuit, and the difference of these parameter values under different connection diagrams of traction motors in the power circuit. Methodology.
O. A. Karzova
doaj
Effect of atmospheric parameters on silicon cell performance [PDF]
The effects of changing atmospheric parameters on the performance of a typical silicon solar cell were calculated. The precipitable water vapor content, airmass and turbidity were varied over wide ranges and the normal terrestrial distribution of ...
Curtis, H. B.
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Electrochemical Polymerization-Fabricated Several Triphenylamine-Carbazolyl-Based Polymers with Improved Short-Circuit Current and High Adsorption Stability in Dye-Sensitized Solar Cells. [PDF]
ACS Omega, 2019 Wang G +5 more
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Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation [PDF]
The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al.
Woo, D. S.
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Smart technique for calculating fault current model parameters using short circuit current measurements. [PDF]
Sci RepMahmoud RA, Malik OP, Fayek WM.
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Comprehensive analysis of temperature distribution in OPGW cable considering ramifications of short circuit current. [PDF]
Sci RepAshfaq A +3 more
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